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Priyanka Dadwal
Priyanka Dadwal

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Analog Design Environment
ICADVM18.1
Rapid Adoption Kit
ADE
worst case corners
Virtuoso Analog Design Environment
Virtuoso
Virtuosity
Run Plan
Custom IC Design
RAKs
IC6.1.8
ADE Assembler

Virtuosity: What's New in Run Plan – Part III

17 Jan 2019 • 3 minute read

After two interesting blogs by Yagya Mishra that explained the most popular features of the Run Plan assistant in Virtuoso® ADE Assembler, I am writing this third blog in the series to share with you the latest features introduced in the IC6.1.8 and ICADVM18.1 releases.

What are Worst Case Corners?

A corner is a combination of variables or process models that define a scenario in which you want to measure the performance of your design.

When you work with large simulation data, defining corner conditions results in hundreds or thousands of possible corner combinations to run. Therefore, running simulations over all corners becomes a time-consuming process that also requires large computation resources. Worst-case corners help to reduce the overall project time devoted to simulation and still provide a high level of accuracy.

By identifying worst-case corners, the problem is reduced to a subset of worst case conditions. These worst-case corners can then be used in verification and design. In addition, running simulations over a reduced set of corners facilitates design changes to be validated quickly.

Worst Case Corners Run Mode in Run Plan

From IC6.1.8 and ICADVM18.1 onward, the Run Plan assistant of ADE Assembler supports the Worst Case Corners run mode. This run mode provides efficient algorithms to automatically find the subset of the corner combinations that represent the worst-case conditions for your circuit. In addition it allows you to set up WCC over a required Run.(x) in your Run Plan sequence and generate worst-case corners using different corner/variable settings without modifying the active setup.

After the simulation run finishes, the worst-case corners are identified and added to the Corner Setup form.

Reusing Worst Case Corners in a new Run

You can also set up conditions in the Run Plan sequence to pass worst case corners generated from one run to another and reduce the number of simulations needed for further analyses. For this, in the 'Use Worst Case Corners' field of the Add/Edit Run Conditions form, just specify the name of the run from which the worst-case corners need to be picked.

So, in this way, you can now run the simulations on worst-case corners with modified simulation setup.

Related Resources

Rapid Adoption Kit

  • Virtuoso ADE Assembler Run Plan Assistant

Download this RAK for a hands-on experience with the Run Plan assistant, including the Worst Case Corners feature. This RAK explains how to:

  • Create a run plan from an active setup and from scratch
  • Create runs with different run modes including worst case corners
  • Access/Modify the run plan based on previous results
  • Add conditions to runs
  • Execute run plans in batch mode

 Blogs

  • What's New in Run Plan - Part I
  • What's New in Run Plan – Part II
  • Analog Design Resonance: When a Plan Comes Together

User Guide

  • Virtuoso ADE Assembler User Guide

For more information on Cadence circuit design products and services, visit www.cadence.com.

About Virtuosity

Virtuosity has been our most viewed and admired blog series for a long time that has brought to fore some lesser known, yet very useful software and documentation improvements, and also shed light on some exciting new offerings in Virtuoso. We are now expanding the scope of this series by broadcasting the voice of different bloggers and experts, who would continue to preserve the legacy of Virtuosity, and try to give new dimensions to it by covering topics across the length and breadth of Virtuoso, and a lot more… Click to Subscribe to visit the Subscription box at the top of the page in which you can submit your email address to receive notifications about our latest Virtuosity posts.

Happy Reading!

Priyanka


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