Community Analog/Custom Design Virtuoso Studio IC23.1 Now Available

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Virtuoso Studio IC23.1 Now Available

• 12 minute read

Virtuoso Studio

Virtuoso Studio IC23.1 production release is now available for download at Cadence Downloads. For information about supported platforms and other release compatibility information, see the README.txt file in the installation directory.

 

IC23.1

Here's a list of the highlights from the Virtuoso Studio IC23.1 release:

  • Virtuoso Studio IC23.1 Overview 
    Our custom IC design solution just got better with Virtuoso Studio ushering into the future of custom and analog design. Leveraging 30 years of industry experience to provide broader support for RF, photonics, mixed-signal, and advanced heterogeneous designs. The new AI-powered Virtuoso Studio advances productivity via automation and innovative features, reimagined infrastructure, and new levels of integration that stretch beyond classic design boundaries.

Virtuoso Analog Design Environment Features

  • Distributed Plotting (Virtuoso Visualization and Analysis XL)
    Use the Virtuoso Visualization and Analysis waveform application as a separate process locally or on a remote machine to distribute plotting to standalone processes. This enhances the productivity of Virtuoso ADE Explorer or Virtuoso ADE Assembler because these products are completely responsive during plotting operations. The memory consumed during plotting is returned to the operating system when the distributed plot window is closed.
  • Re-Evaluating Results Using Distributed Re-Evaluation Mode (Virtuoso ADE Assembler)
    Use distributed re-evaluation mode to improve the performance of large multi-test, multi-corner runs and enable complete GUI responsiveness during expression re-evaluation by distributing this task to remote computers. This feature is helpful when you need to add or modify measurement expressions or specifications after simulation.
  • Optimized LSCS Mode (Virtuoso ADE Explorer, Virtuoso ADE Assembler) 
    Use the more robust and scalable LSCS mode when running hundreds of simulation jobs in parallel. Design netlists are shared as much as possible between points, test and run plans to reduce disk space and to improve performance. Leverage the optimized inter-process communications to avoid overloading message queues and enabling NFS syncing to ensure data integrity on distributed file systems.
  • Composite Requirements for Complex Verification (Virtuoso ADE Verifier)
    Use composite requirements for complex verification of requirements that include measurement specifications for multiple circuit conditions and analyses. Support for these composite requirements is available with import and export of requirements using MS Excel, assignment of verification spaces, and overall coverage reporting.
  • Plotting Waveforms for Device Checks (Virtuoso ADE Explorer, Virtuoso ADE Assembler) 
    Use the hyperlinks in the Checks/Asserts results view to plot waveforms for each violation to enable quick debugging. During a Checks/Asserts simulation, waveform information is automatically saved for any voltages, currents, or operating point parameters when device check or SOA violations are detected. 

Virtuoso Layout Suite Core Editing Features

  • Design Review (Virtuoso Schematic Editor XL) 
    Use the new Design Review flow to build the process of review and fixes in a design within Virtuoso Studio. Whether you are a designer or a reviewer, you can now better consolidate information about a design. Design review ensures that all review details are located in one place for your reference.
  • Troubleshooting Performance Issues with Diagnostic Center (Virtuoso Layout Suite XL)
    Use the Diagnostic Center as your new one-stop shop for self-help and performance troubleshooting or addressing data integrity issues. In particular, the Health Monitor provides information to help you set up Virtuoso Studio for better performance. The Health Monitor also tracks the system resources utilized by Virtuoso Studio and other processes to identify external factors that could slow your setup. You can easily fix a data integrity issue, report a performance issue, and turn it around with access to more debugging data.
  • Schematic Assistant (Virtuoso Layout Suite XL)
    Use the Schematic assistant to view the schematic corresponding to the currently open layout design, saving onscreen real estate. This is a docked assistant now available in Virtuoso Layout Suite XL and higher tiers. The assistant supports move, pan, zoom, and cross-selection to the layout.
  • Creating Repeated Patterns Using Group Arrays (Virtuoso Layout Suite XL)
    Use group arrays to quickly create repeated patterns of objects in your designs. You can easily customize group array attributes such as the number of rows and columns, spacing between cells, and orientation of individual cells.
  • Application Readiness Checker Form (Virtuoso Layout Suite XL)
    Use the Application Readiness Checker to improve the process of checking and updating the layout from the source and to provide a one-to-one correspondence between the checks and updates, with the ability to choose the checks you want for different applications. You can also extend the checks by registering SKILL-based check and update tests. For LVS-complete designs, the tool automatically updates the schematic and layout correspondence to the best match before running the checks and updates.
  • Incremental Check Against Source (Virtuoso Layout Suite XL)
    Use the Check Against Source feature to create markers and glyphs on canvas when an edit command introduces differences between the layout and the schematic. This lets you get instant feedback and correct issues and maintain correspondence with the schematic. You can enable the functionality by using the incrementalCas environment variable.
  • Dummy Instance Backannotation Flow (Virtuoso Layout Suite XL)
    Use interactive backannotation to the schematic for dummy instances to synchronize the two views. Back Annotate Dummies Form has improved row and column placement and support for mfactored or iterated instances.
  • Pins Table Revamped for the Generate Layout and Update Components and Nets Forms (Virtuoso Layout Suite XL)
    Pins table of the Generate Layout and  Update Components and Nets forms has been revamped to let you view both optical (Photonics) and electrical pins in the same table. This new table allows column filtering and multiple field editing for all pin parameters.
  • Capture and Replay Assistant (Virtuoso Layout Suite EXL)
    Use the Capture and Replay assistant to record a series of actions in a design and replay them across cellviews and sessions.
  • Copy Route (Virtuoso Layout Suite EXL)
    Use the copy route feature to quickly, reliably, and incrementally generate thousands of bus signals over a long distance using a single bus bit as a topology reference. From the reference, the remaining bus bits can be created automatically with options to change the wire width, layer, and spacing as needed. This eases the addition of bus bits to an already routed bus. Preview mode can detect obstacles to the bus routing and move them out to create space for the wires.
  • Interactive DRC Clean Vias (Virtuoso Layout Suite EXL)
    Use the DRC Fix option to check DRC issues and ensure that DRC-clean vias are created in the layout when running the Create Wire command.
  • Auto Via Assistant (Virtuoso Layout Suite EXL)
    Use the Auto Via assistant to analyze and create vias. 
  • Automatic Twig Mesh Routing (Virtuoso Layout Suite EXL)
    Use the automatic twig generation feature to simplify the interactive mesh routing by providing a current distribution capability that can control the number of mesh twigs needed to distribute the same current in multiple parallel paths avoiding the need for stacking in twigs.
  • Viewing Cross Sections of a Layout (Virtuoso Layout Suite MXL)
    Use the cross-section viewer to view cross-sections of physical layers in a layout. The viewer displays the different layers in a cross-section from top to bottom.

Virtuoso Layout Suite Automation Features

  • Layout MXL (Virtuoso Layout Suite MXL)
    Use Virtuoso Layout Suite MXL to access all the Layout EXL functionality and the new integrated automated placement and routing solutions available under a unified interface to cater to all the design styles across mature and advanced process nodes. You can use Layout MXL as the default cockpit for designing the IC in the context of the system because the tier provides the technologies to offer heterogeneous design solutions, supporting co-design as well as co-analysis of the parasitic, electrical, and thermal aspects of chip, package, and PCB components to achieve the intended circuit behavior.
  • Integrated Place and Route Solution (Virtuoso Layout Suite MXL) 
    The Virtuoso Layout Suite MXL tier in Virtuoso Studio provides an integrated place-and-route (P&R) solution that reduces the custom layout implementation from days to minutes. Enhanced layout productivity is achieved through best-in-class placement and routing engines for device, standard cell, and chip assembly design styles. With the automation engines connected through the unified, easy-to-use interface in the Virtuoso Layout Suite, you can build a seamless P&R flow according to your design needs to achieve the best quality results and accelerate time to results. 
    • Automated Device-Level Placement and Routing
      Use the improved automated P&R solution in Virtuoso Studio to easily create DRC-correct analog and custom digital device-level layouts on advanced-process nodes. Intelligent device grouping, enhanced controls for device array placement, row-based and non-uniform grid-based device snapping, and advanced cell fill are a few features that drive automated symmetric analog device placement. Automated routing on width spacing-based track patterns with support for mesh routing structures alleviates complex wiring troubles for a large number of series and parallel devices in FinFET process technology.
    • Automated Standard Cell Placement and Routing
      Use the industry-leading GigaPlace and NanoRoute engines from Innovus Implementation System as they are now integrated seamlessly into the Virtuoso Layout Suite MXL to provide highly efficient standard cell P&R automation for advanced node digital blocks in mixed-signal designs.
      Use these engines within your familiar GUI-driven use model for seamless digital block implementation. You can achieve quick routing results through intelligent data abstraction. The powerful pre-route checkers ensure high-quality routing results.
    • Automated Chip Assembly Routing
      Use the enhanced Virtuoso Chip Assembly Router in Virtuoso Layout Suite MXL to solve block-level routing challenges. The router provides fast time to results and improved results quality for track-based and non-track-based layouts in mature process nodes. The Innovus NanoRoute engine can be used to achieve block-level routing for advanced process nodes.

For more information, see the Integrated Place and Route application note.

Virtuoso Multi-Technology Solution Features

Virtuoso Electromagnetic Simulation Features

Virtuoso Documentation Viewer

  • New Documentation Viewer
    Use the new smart, cloud-based help viewer to view topic-based, Cadence documentation. The new viewer supports Offline and Online modes and provides new-age Help features such as intelligent, topic-based search, user-experience personalization, 24X7 content updates, and many other robust capabilities.

For more details on these and all the other new and enhanced features introduced in this release, see:

Please send questions and feedback to virtuoso_rm@cadence.com.

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Virtuoso Release Team