Virtuoso IC6.1.8 and ICADVM18.1 Now Available

The IC6.1.8 and ICADVM18.1 production releases are now available for download at Cadence Downloads.

• IC6.1.8
• ICADVM18.1

For information on supported platforms, compatibility with other Cadence tools, and details of key issues reported by our early access partners that have been fixed, see:

• IC6.1.8 README
• ICADVM18.1 README

The links above are functional at the time of publishing. If you encounter any links that are now obsolete, visit https://downloads.cadence.com and select the release name you are interested in to access the related files. 

Here is a list of some important features introduced in IC6.1.8 and ICADVM18.1 releases:

• Pathbreaking Design Planning Capabilities (ICADVM18.1 Only)
  Generate, place, and route seamlessly at advanced and mature nodes. Plan more efficiently at the top level, block level, and cell level.

• Concurrent Layout Editing Capabilities (ICADVM18.1 Only)
  Collaborate and work concurrently. Work on the same design cellview at the same time, reduce design cycle time and increase productivity.

• Improved Productivity and Design Reliability with SDR (ICADVM18.1 Only)
  Use the new Simulation Driven Interactive Routing (SDR) flow to overcome the electrical and parasitic challenges of critical circuits. Create a layout design using a predictable flow that meets the current density constraints and, in turn, significantly reduces the sign-off time.

• New Assistant for Quick and Accurate Routing Congestion Results and Route Planning (ICADVM18.1 Only)
  Use the new Congestion Analysis assistant to get quick and accurate routing congestion feedback, guide routing of net groups, improve floorplanning, optimize pin generation and placement, and reduce overall die size.

• Predefined Setup Driven MPT flows (ICADVM18.1 Only)
  Use the newly defined SKILL APIs available to set up the MPT engine with predefined MPT flows.

• Virtuoso RF Flow – A Next Generation Flow Now in Virtuoso (ICADVM18.1 Only)
  Use the now integrated IC and package design flow to overcome the traditional tool boundaries and co-design issues.

• Virtuoso Multi-Technology Framework Design Environment (ICADVM18.1 Only)
  Choose the physical implementation options of module or package through the Module menu in Virtuoso Schematic Editor XL and Virtuoso Layout Suite EXL.

• Innovative Method to Capture and Communicate Design Goals
  Capture and communicate your schematic design goals on existing objects and give layout designers the freedom to decide how those goals are implemented.

• Smart and Efficient In-design Verification
  Use the redesigned Design Rule Driven (DRD) tool for its performance boost, enhanced user control in new consolidated interface, and smart use models for improved visualization.

• New Assistant for Simulation Planning and Coverage
  Create project-specific operating conditions--corners, sweeps, and model files--and share them efficiently across multiple ADE Assembler sessions. Review the missing operating conditions and the progress of your design based on Analog Coverage reported in ADE Verifier.

• Pin Assistant: A One Stop Shop for all Pin-Related Tasks
  Use the new Floorplanning Pin Assistant tool for its unified interface for all pin-related tasks, capability to allow creating pins from labels and nets, and custom resizing of pins. Also watch out for its upcoming Promote Pins and Merge Pins support and Create Rails functionality with conflict detection and avoidance capability.

• Plotting Template Support in ADE Explorer and ADE Assembler
  Use the plotting templates to plot resultant waveforms, signals, or scalar values in a specified format in the Virtuoso Visualization and Analysis XL window.

• Customization Support for ViVA XL Subwindows
  Customize the Virtuoso Visualization and Analysis XL subwindows, drag and resize them, create a custom grid of subwindows, open blank subwindows for rectangular, polar, impedance, and admittance plots and then plot the signals into them.

• Legato Reliability Solution for Analog Fault Simulation
  Use the new Legato fault analysis functionality in ADE Assembler to catch defects and to generate reports that can quantify the manufacturing defect coverage, and thereby reduce test escapes.

• Easy to Understand, Write, and Modify ASCII Technology Files
  Use the new Techfile IDE that offers several useful features over the conventional text editors to work more efficiently with ASCII technology files.

• Debug Spectre Simulations Interactively
  Interactively debug Spectre simulations by using events, triggers, and breakpoints. Run the tool in standalone mode or from the results of a simulation run in ADE Assembler.

• New Smart View in ADE using Quantus
  Use the new Quantus Smart View, the next generation of the Extracted View, for the same functionality as the Extracted View but with performance improvements and reduced netlist size.

For more details on these and all the other new and enhanced features introduced in this release, see:

• IC6.1.8 What's New
• ICADVM18.1 What's New 

Contact Us

Please send questions and feedback to virtuoso_rm@cadence.com.

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Virtuoso Release Team