• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Blogs
  2. Analog/Custom Design
  3. Virtuoso Meets Maxwell: Are You Telling Me I Can Auto-Generate…
VRF Knight
VRF Knight

Community Member

Blog Activity
Options
  • Subscribe by email
  • More
  • Cancel
CDNS - RequestDemo

Have a question? Need more information?

Contact Us
IC Packaging
Footprint
VRF
Virtuoso Meets Maxwell
Virtuoso System Design Environment
Virtuoso RF Solution
Virtuoso MultiTech
Package Design in Virtuoso
Virtuoso
RF design

Virtuoso Meets Maxwell: Are You Telling Me I Can Auto-Generate a Package Schematic From a Package Layout?

12 Dec 2022 • 4 minute read

'Virtuoso Meets Maxwell' is a blog series aimed at exploring the capabilities and potential of Virtuoso® RF Solution and Virtuoso MultiTech. So, how does Virtuoso meet Maxwell? Now, Virtuoso platform supports RF designs, and the RF designers measure the physical and radiation effects by using the Maxwell's equations. In addition to providing insights into the useful software enhancements, this series broadcasts the voices of different bloggers and experts about their knowledge and experience of various tools in the Virtuoso IC-Packaging world along with the nuances of RF, microwave, and high frequency designs. Watch out for our posts on Mondays.

 

Yes, you heard that right! You can now auto-generate a package schematic from a package layout with a snap of a finger! With Virtuoso RF Solution, there are all kinds of automations that allow you to have a connectivity-driven design. You can verify the connectivity by the top-level analog simulation and functional verification to make sure your netlist and results are within your expectation. In addition, verify your layout connectivity against the netlist at any point in your design cycle to make sure that the design that you are taping out is in good shape. Although our recommendation is for you to always start from scratch to build your schematic and then propagate the connectivity to your layout, we understand that there are times when your layout has already started, and you would like to import and use the connectivity information as your reference to build your golden schematic.

In this blog, I’m will show you how you can automatically create a schematic from your SiP layout to use it as your reference starting point. Also, the assumption is that you have already read through the Virtuoso Meets Maxwell: Getting Your Existing SiP File Into Virtuoso RF Solution blog, and you understand how the package technology library is created in the Virtuoso environment from a SiP file.

Stage 1- You have your SiP file already imported into the Virtuoso environment and have the package technology library. Now you create a design library that is attached to the technology library and create a new schematic, as shown in the snapshots below:

Stage 2- Now click on the Module menu and then create a MultiTech schematic, which opens up a form where you can point to your SiP file to create a package schematic:

Stage 3- The first step is to point to a SiP file and then click Setup Map Table so that you can review and map all the components existing in your package layout in a tabulated format, as shown in the snapshot below:

Stage 4- Once your mapping table is populated, you can add libraries and cells to which you want these components to be mapped. In this example, the components are residing in the package technology library, so you can add only this library, as shown in the snapshot below, but you could have multiple libraries. For example, for each component type you may have separate libraries, such as an SMD library, I/O library, or others, which can be defined in an order in the Mapping Libraries list.

Stage 5- Once the mapping is done and all looks good, you click OK, and your schematic is created automatically:

Note: When your schematic gets created, a file called mapping.out gets created in your work directory, which you can use in a future run to modify the mapping libraries and add your own automation to it if you like to avoid some of the manual steps which we covered in this blog. That way, all you need to do is to point to your SiP file and point to this mapping file in the Map File area as shown in the snapshot below, and click ok for your schematic to get created.

To conclude this blog, you need to go through the stages mentioned in this blog to create your package schematic from your SiP layout. This gives you a reference point to create a golden schematic with a verified netlist that you can use to drive your package layout and check the connectivity as your layout design is progressing. Happy holidays and see you again in the new year!

Related Resources

   Datasheet

Virtuoso RF Solution

What’s New in Virtuoso

   Product Manual

Virtuoso MultiTech Framework Guide

Virtuoso RF Solution Guide

Virtuoso Electromagnetic Solver Assistant User Guide

   Free Trials

Virtuoso RF Solution - Module Layout with Edit-in-Concert

Virtuoso RF Solution - EM Analysis

Virtuoso RF Solution - Physical Implementation Flows

For more information on Cadence circuit design products and services, visit www.cadence.com.

Sanam Vakili

Contact Us

For any questions, general feedback, or even if you want to suggest a future blog topic, write to custom_ic_blogs@cadence.com.

About Virtuoso Meets Maxwell

Virtuoso Meets Maxwell series includes posts about the next-generation die, package, and board design flow with a focus on reinventing and optimizing the design process to ensure that the designer remains a designer! Keep watching! Subscribe to receive email notifications about our latest Custom IC Design blog posts.


CDNS - RequestDemo

Try Cadence Software for your next design!

Free Trials

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information