Virtuoso Meets Maxwell: Cross-Fabric Electromagnetic Extraction - Eliminating the Tedious Work of Merging IC, Package, and Board

19 Jul 2020 • 8 minute read

'Virtuoso Meets Maxwell' is a blog series aimed at exploring the capabilities and potential of Virtuoso RF Solution and Virtuoso MultiTech. So, how does Virtuoso meets Maxwell? Now, the Virtuoso platform supports RF designs, and the RF designers measure the physical and radiation effects by using the Maxwell's equations. In addition to providing insights into the useful software enhancements, this series broadcasts the voices of different bloggers and experts about their knowledge and experience of various tools in the Virtuoso IC-Packaging world along with the nuances of RF, microwave, and high frequency designs. Watch out for our posts on Mondays.

When designing RFICs or RF modules, analyzing the electromagnetic behavior on the IC or module in isolation doesn't tell the full story. Even if the IC behaves to spec on its own, there can easily be coupling to a nearby trace on the module that can ruin our response. Only a combined electromagnetic model of IC and module gives us the confidence that our system really behaves as expected. Traditionally, assembling a combined model of IC and package geometry has been very tedious and error prone. Data had to be manually translated from various isolated platforms and assembled into a 3D model. Even worse, those manual steps had to be repeated for every design iteration.

Today we will see how easy it is to set up this kind of analysis with the Virtuoso RF Solution: all the data merging and translating is taken care of by the tool and the designer can focus on the electromagnetic analysis. And, because the Virtuoso RF Solution has the complete IC and package geometry in memory, iterative changes to the layout can be made directly in the Virtuoso platform and pushed to Clarity 3D Solver fully automatically.

We will start with the RF Module that we have imported from SiP Layout Option into Virtuoso RF Solution.

In the center, we see the footprint of the flip-chip IC. We want to analyze the coupling of an on-chip inductor with the RF path on the module. Actually, this solution is not just limited to ICs and RF Modules. We could even include a carrier PCB in the analysis if we wanted to, but we’ll skip that here to keep things simple.

We already have the full IC layout in a different library. With the Bind Layout command, we can link the IC footprint in the module layout to the corresponding IC layout top-level cellview so that we can invoke co-design:

Now, we can see the RF module in the context of the full IC layout – with the IC correctly flipped and rotated of course.

And, in the other tab of the Virtuoso Layout EXL window, we can see the IC in the context of the package – in traditional R0 orientation of course, just like an IC designer would expect:

In the Electromagnetic Solver Assistant, we already have a model for the IC setup. It contains the on-chip inductor, three bumps and connecting nets. There is also a horizontal lumped gap port from the RFin bump to a neighboring ground bump.

This kind of a single-fabric IC model can be easily analyzed in Clarity 3D Solver with a couple of mouse clicks from the Virtuoso platform. Without the Virtuoso RF Solution, we would have to import the GDS into Clarity 3D Solver manually – not hard but still painful.

But as can be seen from the title, we didn’t come here to analyze just the IC: we want to analyze the coupling between the IC and the module. Could we do it manually in Clarity 3D Solver? Sure, but it would be much harder than just importing a GDS file. Now, we also have to flip and rotate the GDS data and correctly align it with the package layout imported from SiP Layout Option. Don’t forget to merge the stack-ups correctly, and cross your finger there is no optical shrink applied to the IC after tape out.

Thankfully, the Virtuoso RF Solution takes care of all this laborious and error-prone merging and translating! All we have to do is specify which nets and instances we want to simulate in Clarity 3D Solver and Virtuoso RF Solution will take care of the rest.

Above, we have already picked the IC geometry that we want to have in Clarity 3D Solver, so let’s switch back to the RF Module and set up our model there.

For this experiment, we want to include the RF input path, from the ball to the bump. There is a blocking capacitor SMD that we won’t include (later Virtuoso will automatically create ports for the SMD). And to reduce the simulation time, we will draw a cutting boundary around the area of interest.

For this kind of coupling analysis, it is very important that we specify the correct IC bump dimensions. With the “Bump and Ball Editor” form we can confirm them directly in the Virtuoso platform. These were automatically imported from SiP Layout Option, and here, we can review and edit them as needed. Similarly, we can also select the BGA instance and double-check the ball dimensions.

Now let’s review what we have done so far: We have set up two models, one with the IC geometry of interest and one with the package geometry of interest. Now we need to somehow tell the tool that we want to analyze both together. This is where “referenced models” come into the picture.

We will reference the IC model from the package model. That way the IC geometry will be included when we export the module geometry to Clarity 3D Solver. Referencing a model is very simple, we just select the IC and click a button to add it to the model. This brings up a form that lists all suitable models in the IC layout. As expected, we see our “rfin_mmic” model that we had created earlier.

Now our package model is complete: it has the package geometry of interest, a cutting boundary, and it references the IC model with the IC geometry of interest.

The final step before we can export to Clarity 3D Solver is the port setup on the RF module. As discussed earlier, we won’t include the SMD capacitor in the RF input path. Instead, the Electromagnetic Solver assistant will automatically create two vertical lumped ports for us from the SMD pads down the ground plane underneath. In addition, Clarity 3D Solver will automatically create a coaxial port for us on the BGA ball, and we have the horizontal lumped port between the IC bumps that we created earlier.

With a single mouse click, we can now export our cross-fabric IC+Package model to Clarity 3D Solver. All the book-keeping work like scaling, flipping, rotating and stack-up merging is done automatically by the Virtuoso RF Solution!

After just a couple of seconds, our merged model is loaded into Clarity 3D Solver:

We can see the IC inductor and the three bump pads in the center, as well as the RF input path on the package and the ground plane in the cutting boundary. On the right, the merged stack-up is shown, with the package layers on the bottom, and the flipped IC stack on top.

Looking from a different angle, we recognize the four ports we had expected: a coaxial port on the BGA ball, two vertical ports on the SMD and a horizontal port between the IC bumps.

Once the simulation is finished, we will have a 4-port S-parameter model in the Electromagnetic Solver assistant.

Now, of course, just because the EM solver is done does not mean our task is finished. Before we can run circuit simulation, we will have to somehow stitch the S-parameter n-port into our system schematic. Thankfully, the Virtuoso RF Solution takes care of that as well: with the push of a button our S-parameter result is stitched into our hierarchical system schematic, regardless of how many levels down in the hierarchy each port has to be connected!

And because the Virtuoso RF Solution knows exactly which parts of the system were modeled in Clarity 3D Solver it can highlight them for us on the system schematic:

Here, we see the RF input portion on the RF module. The complete path to the IC is highlighted, except for the SMD which was not part of the model.

Descending down into the IC schematic, we can see exactly those three bumps and inductor highlighted that we had added to our model from the IC:

After we have stitched the n-port into the system schematic, we can use Virtuoso ADE Assembler to easily run our system testbench with both the original schematic and the extracted view with S-parameters.

This concludes our cross-fabric analysis of this design. We have seen how easy it is to set up a cross-fabric analysis with Virtuoso RF Solution: by using “referenced models” we can easily combine models from different fabrics. The Virtuoso RF Solution then takes care of all the error-prone work of merging the geometry and stack-up. This lets you focus on the actual EM behavior you wanted to analyze, rather than trying to flip, scale, and rotate IC geometry!

Related Resources

For more information on Cadence circuit design products and services, visit www.cadence.com.

About Virtuoso Meets Maxwell

Virtuoso Meets Maxwell series includes posts about the next-generation die, package, and board design flow with a focus on reinventing and optimizing the design process to ensure that the designer remains a designer! Keep watching!

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Johannes Grad