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Featured

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
KomalJohar 17 Dec 2025 • 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog

Virtuoso Studio IC25.1 ISR2 Now Available

Virtuoso Studio IC25.1 ISR2 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 23 Oct 2025 • 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Spectre 25.1 Release Now Available

The SPECTRE 25.1 release is now available for download at Cadence Downloads. For…

SpectreReleaseTeam
SpectreReleaseTeam 5 Aug 2025 • 1 min read
featured , Spectre FMC Analysis , Spectre RF , Spectre Photonics , Spectre AMS Designer
Analog/Custom Design
Latest blogs

Virtuosity: 19 Things I Learned in April 2014 by Browsing Cadence Online Support

Plenty to keep you busy this month. Lots of RAKs, videos, and new Quick Start Guides…

stacyw 22 May 2014 • 4 min read
Variability Aware Design , AMS , Virtuoso online support , Routing , ADE XL , Virtuoso Analog Design Environment , Spectre , Schematic Editor , Virtuosity , Virtuoso Layout Suite XL

High Yield Analysis and Optimization - How to Design the Circuit to Six Sigma

Why high yield analysis? One failed memory cell out of millions cells will cause…

Hongzhou Liu 12 May 2014 • 2 min read
Six Sigma , Virtuoso , Circuit Design , analog design , high yield analysis

How Can You Learn About Mixed-Signal Verification and Implementation Flows at Your…

The vast majority of SoCs today are advanced mixed-signal designs. The old mixed…

SumeetAggarwal 30 Apr 2014 • 3 min read
real number modeling , AMS Designer , EDA training , SV-RNM , DMS , mixed signal , Schematic Model Generator , RAKs

What’s New in Virtuoso ADE XL in IC616 ISR6?

In a previous post, I explained the release model used for Virtuoso ADE and ViVA…

Tom Volden 28 Apr 2014 • 1 min read
Analog Design Environment , custom IC simulation , ADE XL , Virtuoso Analog Design Environment , Virtuoso , ADE-XL , Circuit Design , Custom IC Design , IC 6.1.6

Keeping Your Circuit in Tune: Sensitivity Analysis and Circuit Optimization

Anyone who has ever played a musical instrument knows how hard it can be to keep…

stacyw 21 Apr 2014 • 4 min read
Variability Aware Design , ADE GXL , worst case corners , optimization , Virtuoso , statistical corners , Variation

Virtuosity: 15 Things I Learned in March 2014 by Browsing Cadence Online Support

Highlights for this month include lots of useful Physical Verification System (PVS…

stacyw 15 Apr 2014 • 2 min read
Variability Aware Design , ADE GXL , Virtuoso , Analog Design Environment , PVS

What's New(-ish) in ADE XL in IC 616 ISR 3?

Development Model for ADE and ViVA Virtuoso Analog Design Environment (ADE) and…

Tom Volden 15 Apr 2014 • 1 min read
Analog Design Environment , ADE XL , Custom IC Design , IC 6.1.6

Mismatch Contribution Analysis in Virtuoso Analog Design Environment GXL

When Monte Carlo analysis shows device mismatch variation has become problematic…

Lorenz 2 Apr 2014 • 2 min read
ADE GXL , ADE XL , mismatch variation , Virtuoso Analog Design Environment , Monte Carlo , mismatch contribution analysis

Efficient Design Migration Using Virtuoso Analog Design Environment GXL

Requirements for decreased time to market, reduced silicon area, and minimized power…

Tom Volden 21 Mar 2014 • 2 min read
Analog Design Environment , ADE GXL , ADE XL , Virtuoso , Custom IC Design , Design Migration

Fast Yield Analysis and Statistical Corners

The Virtuoso Analog Design Environment XL Monte Carlo sampling methods are Random…

Lorenz 10 Mar 2014 • 3 min read
ADE GXL , ADE XL , fast yield analysis , Virtuoso Analog Design Environment , Monte Carlo , statistical corners

Virtuosity: 14 Things I Learned in January and February 2014 by Browsing Cadence…

Time just got away from me last month, so here's two months worth of new content…

stacyw 7 Mar 2014 • 2 min read
AMS , Corners , ADE , ADE-GXL , PVT corners , Custom IC Design , Virtuoso Layout Suite

What's the Worst that Could Happen?: Worst-Case Corners in ADE GXL

In addition to combinations of temperature range and power supply voltages (usually…

stacyw 24 Feb 2014 • 2 min read
Variability Aware Design , Corners analysis , worst case corners , Virtuoso Analog Design Environment , ADE-GXL , Analog Design Environment

What Your Circuit Doesn't Know, Can Kill It!

Device variation has been a long-standing problem in custom design. Over the years…

NewYorkSteve 14 Feb 2014 • 1 min read
IP , post-extraction , corner , in-design , Virtuoso Analog Design Environment , physical implementation , device variation , IC design

Virtuosity: 15 Things I Learned in December 2013 by Browsing Cadence Online Supp…

With this month's title, I'll need to start adding the year, as this marks the one…

stacyw 17 Jan 2014 • 3 min read
RF Simulation , AMS , Low Power , PCells , ADE , Layout , Virtuoso , Spectre , Analog Design Environment , ADE-XL , PVS , SKILL

Virtuosity: 12 Things I Learned in November by Browsing Cadence Online Support

New content on a wide variety of topics in November. Product Information 1. Cadence…

stacyw 18 Dec 2013 • 2 min read
EAD , AMS Designer , Virtuoso , AMS simulation , PVS

Support for Low Power Mixed Signal Designs in Virtuoso Schematic-XL

Why is There a Need for Low Power Solutions? With an increase in the demand for…

DeveshJain 10 Dec 2013 • 8 min read
Low Power , mixed signal design , mixed-signal methodology , mixed signal solution , CPF , LVS , cdl , Schematics-XL , Mixed-Signal , analog/mixed-signal , Virtuoso , mixed signal

SKILL for the Skilled: SKILL++ hi App Forms

One way to learn how to use the SKILL++ Object System is by extending an application…

Team SKILL 1 Dec 2013 • 10 min read
layout hierarchy , Jim Newton , schematic hierarchy , object orientation , Layout , Virtuoso , object system , software development , design hierarchy , SKILL++ , SKILL , Schematic

SKILL for the Skilled: Simple Testing Macros

In this post I want to look at an easy way to write simple self-testing code. This…

Team SKILL 21 Nov 2013 • 5 min read
Team SKILL , programming , shuffle , Jim Newton , SKILL for the Skilled , macros , Lisp , SKILL++ , SKILL

Virtuosity: 12 Things I Learned in October by Browsing Cadence Online Support

Lots of routing, a little AMS, and finishing off with some fun... Application Notes…

stacyw 15 Nov 2013 • 3 min read
SystemVerilog , AMS , PAD , Virtuoso Space-based Router , VSR , Routing , Spectre , mixed signal

IC6.1.6 Virtuoso Space-Based Mixed-Signal Router (VSR)

Virtuoso Space-Based Router (VSR) is routing solution integrated into the Virtuoso…

AndreasLenz 29 Oct 2013 • 4 min read
Technology on tour , MS ToT , VSR , mixed-signal ToT , mixed-signal training , Router , tech on tour , Open Access , analog/mixed-signal , OA: OpenAccess , tech-on-tour

Virtuosity: 16 Things I Learned in September by Browsing Cadence Online Support

Rapid Adoption Kits By now, I think you know what RAKs are, and that they include…

stacyw 11 Oct 2013 • 3 min read
custom/analog , Routing , Rapid Adoption Kit , pin placement , Virtuoso Analog Design Environment , Layout , Virtuoso , Analog Design Environment , Schematic Editor , ADE-XL , Virtuosity , Custom IC Design , Virtuoso Layout Suite , VLS XL , Virtuoso Layout Suite XL

SKILL for the Skilled: How to Shuffle a List

The previous post of SKILL for the Skilled presented some ways to systematically…

Team SKILL 9 Oct 2013 • 5 min read
Team SKILL , programming , shuffle , Jim Newton , IC615 , SKILL for the Skilled , permutations , random , Lisp , SKILL++ , SKILL

Cadence’s Annual Mixed-Signal Summit 2013: A Mind Meld of Mixed-Signal Design Co…

If you're a fan of the Star Trek series (my six-year-old son and I watch it together…

Sathish Bala 6 Oct 2013 • 2 min read
IP , cadence , AMS Designer , SV-DC , Incisive , SV-RNM , DMS , Virtuoso , mixed-signal book , mixed-signal summit , RNM , mixed signal

Virtuosity: 15 Things I Learned in August by Browsing Cadence Online Support

Our folks over in Physical Design have been busy churning out helpful Rapid Adoption…

stacyw 11 Sep 2013 • 3 min read
Rapid Adoption Kit , Virtuoso , Spectre , Virtuosity

SKILL for the Skilled: Visiting All Permutations

In this posting I want to look at several ways of generating permutations of a list…

Team SKILL 4 Sep 2013 • 8 min read
Team SKILL , programming , Jim Newton , IC615 , SKILL for the Skilled , permutations , Lisp , SKILL++ , SKILL

SKILL for the Skilled: How to Copy a Hash Table

In this posting I want to look at ways to copy a hash table in SKILL. There are several…

Team SKILL 28 Aug 2013 • 8 min read
Team SKILL , programming , hash table , Jim Newton , IC615 , SKILL for the Skilled , Lisp , SKILL++ , SKILL

Virtuosity: 16 Things I Learned in July by Browsing Cadence Online Support

Feeling a bit lazy this month, but even without digging too deeply, I could find…

stacyw 12 Aug 2013 • 2 min read
AMS , mixed-signal simulators , custom/analog , Virtuoso Space-based Router , Routing , Rapid Adoption Kit , MMSIM , Mixed-Signal , Virtuoso , Schematic Editor , Virtuosity , AMS simulation , mixed signal , Modeling , Custom IC Design , space based router

Coming Soon: Asia-Pacific Mixed Signal Summit and Tech-On-Tour Events

Cadence is bringing the Analog/Mixed-Signal Summit to Shenzhen, China, and the Mixed…

Sathish Bala 15 Jul 2013 • 1 min read
conformal , SystemVerilog , EAD , AMS , EDI , Low Power , IP , Penang , Technology on tour , mixed-signal ToT , Cadence events , tech on tour , AMS Designer , behavioral modeling , Encounter Digital Implemenation , Advanced Node , analog , Incisive , Shenzhen , LDE , analog/mixed-signal , Virtuoso , mixed-signal summit , RNM , mixed signal , SMG , Cadence Community , Singapore , verification
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