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A few days back, I was looking out of my office window. The streets were busy again with the same old traffic jams, crowded roads, and honking vehicles. All symptoms of the life gaining normalcy after the lockdown norms easing gradually!
So, do only the crowded streets have noise? Well no, even the electronic circuits have noise. If you are wondering how "noise" comes into chips and SOCs, and how engineers deal with them, then continue reading this blog because you might find answers to some of your questions.
The hustle bustle of the cities is only an example of the external noise, which we are aware of through the obvious observations of our sensory organs. However, in terms of electronics, a noise maybe defined as any kind of unwanted signal that interferes with the real signal in a timing path in a cell or circuit. To understand why analysis of noise is important in the circuits and how Cadence® LiberateTM Characterization Portfolio can help, let us now explore some questions that people have about noise characterization.
While designing a circuit, the main intent of a designer is to ensure that the device is functional for a wide range of operating conditions. If a noise is injected in the circuit, then it might malfunction completely if the noise is not analyzed properly. In most cases, coupling capacitance causes electrical pulses that are the main form of noise inside a circuit.
Today, in the latest technology nodes, we want our devices to be as small as possible, but without compromising the features. This asks for more transistors in the same chip area, which means more and more smaller transistors are sitting closely. Also, the wires and interconnects connecting those transistors in such close proximity gives rise to coupling capacitance more than ever.
Now you may ask that how does this lead to more noise in the circuit? Well, let’s understand it better through the figures below. In the diagram shown below, when the aggressor net switches, it makes the victim net to switch due to cross coupled capacitance. This may cause functional failure of the design and lead to more power consumption. Therefore, it becomes important for the designers to model accurate noise characteristics at the cell level and be aware of the possible failures early in the design cycle.
Broadly, there are two models for noise characterization -- Composite Current Source Noise (CCSN) and Effective Current Source Model (ECSM).
CCSN characterization refers to current-based modeling of accurate noise analysis done using SPICE simulations. The noise information in a Liberty file can be modeled broadly based on the following three components:
Liberate handles the three main noise components as described below:
In Liberate, the noise data is modeled in the following two ways:
Also, the CCSN data is stored either under a timing arc or pin. Arc-based storage applies to simple cells like INV and AND where generally the path length is up to 2, whereas pin-based storage is for complex cells with multiple stages.
The picture below shows how the noise characterization and modeling methodology is handled by Liberate at different stages.
Liberate offers the following advantages for CCSN characterization:
Once we have cell-level noise data comprising the CCS Noise or Effective Current Source Model (ECSM) Noise libraries from Liberate, this data is used by downstream tools to analyze the effects of glitches on bigger blocks or designs. Several models like Receiver Input Peak (RIP) and Receiver Output Peak (ROP) are used for noise analysis that in turn uses Voltage-in/Voltage-out tables for the first and last stages of every cell timing arc from Liberty files for quick and accurate glitch study.
With this, I'll bring this blog to an end, leaving a trailing thought for you about how do you think noise can pose characterization and design challenges in advance nodes?
Until I return with more, take care!
Signing off for now.
How to model CCSN in input_ccb/output_ccb formats
Liberate Characterization Reference Manual
Liberate Characterization Portfolio Command and Parameter Support Matrix
For any questions, general feedback, or even if you want to suggest a future blog topic, write to firstname.lastname@example.org.
Library Characterization Tidbits is a blog series aimed at providing insight into the useful software and documentation enhancements in the LIBERATE release. In addition, this series would broadcast the voices of different bloggers and experts, who would share their knowledge and experience about all the tools in Liberate Characterization Portfolio. To receive notifications about the new blogs in this series, click Subscribe and submit your email ID in the Subscriptions box.