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P Saisrinivas
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What Should I Do If AI Is Doing Everything?

31 Aug 2026 • 3 minute read

If AI can do physical design, why should I learn physical design? This blog will give you a direct answer in two minutes.

I recently attended CadenceLIVE India, an insightful event showcasing how semiconductor innovation is evolving to support the rapidly growing AI era.  

In the event that every chip designer I talk to eventually starts and ends the conversation about AI. During those conversations, one engineer asked a question that motivated me to write this blog. "If AI can already floorplan a block, generate a routing solution, or tune a hundred synthesis knobs faster than I ever could, what exactly am I supposed to be doing?" It is not a fear unique to chip design — the honest answer is that the question itself is slightly off. AI is not really "doing everything." It is doing the execution layer's work — and that changes what "everything" means for us.

    

Think about it this way. AI is becoming the driver. Fundamentals are your driving knowledge. If someone doesn't understand physical design, they may be able to ask AI, "Fix this timing violation." But when AI gives them a solution, they won't know:

  • Is the solution actually correct?
  • Why did the setup fail?
  • Why did the hold get worse?
  • Is the problem placement, CTS, routing, or constraints?
  • Is the optimization hurting power or area?
  • Which recommendation should they accept?
  • When is AI hallucinating or making a technically bad tradeoff?
  • How do they debug a result that AI couldn't solve?

That's where fundamentals become more valuable, not less.

       

Let me use an easy analogy: a calculator vs mathematics. Calculators didn't make mathematics useless when they were invented - They changed what humans needed to do manually. Similarly, AI won't eliminate chip-design knowledge - It will eliminate some of the repetitive work around what humans do. You may ask, "If AI can do physical design, why should I learn physical design?" Then my answer would be: Because AI can generate an answer, you still need to know whether it's the right answer and what to do next.

AI can accelerate the journey, but fundamentals help engineers choose the right destination and stay on the right path. AI can do the work. But engineers who understand the fundamentals know what to ask, what to trust, what to fix, and what to optimize. But how do you build your fundamentals and flows?

Building the Fundamentals AI Still Depends On

Start with the Cadence RTL-to-GDSII Flow training course. In just 16 hours, it walks you through the complete flow — RTL coding, simulation, synthesis, DFT, equivalence checking, floor planning, place-and-route, timing signoff, and GDSII generation.

Once you understand the flow, see how AI plugs into it with the Cadence Cerebrus Intelligent Chip Explorer Training, where you learn to define the design goals and cost functions that Cerebrus optimizes against, and to analyze and debug its results — the exact framing and validating skillset this blog talks about. 

There are multiple online courses across various domains that you can find in the following learning maps: Cadence Learning Maps.

Watch the Shorts for anywhere and anytime, practice the formulas, and you'll find the concepts much easier to remember. You can find the shorts in the playlist according to the domain (as shown below). To learn more about shorts, you can find many such YouTube Shorts/videos under Customer Education – Shorts on various topics. You can subscribe to this channel for more information and daily videos/shorts updates.

The Cadence online courses also have an associated exam to certify your knowledge of the course, awarding you a digital badge for each course that you can display on various social media platforms, like your LinkedIn profile, Facebook, etc. (a few digital badges shared below)

           

Related Courses

  • Innovus Block Implementation with Stylus Common UI Training Course 
  • Genus Synthesis Solution with Stylus Common UI Training Course 
  • Tempus Signoff Timing Analysis and Closure with Stylus Common UI Training 
  • Digital Physical Design Domain Certification Training  

Related Blogs

  • AI'm Always With You While Working
  • Mini Clips, Mini Videos, Mega Crave: Why Short Reels Dominate Screens
  • RTL-to-GDSII Backend Webinar: Couldn't Make It? We Saved You a Front Row Seat
  • Training Insights – Why Is RTL Translated into a Gate-Level Netlist?
  • Did You Miss the RTL-to-GDSII Webinar? No Worries, the Recording Is Available!
  • Clock Tree Synthesis (CTS): The Backbone of Physical Design

Happy learning!


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