Leveraging AI to Optimize the Debug Productivity and Verification Throughput

The impact of semiconductors on various sectors cannot be overstated. Semiconductors have revolutionized our operations from the automotive industry to IoT, communication, and HPC. However, as demand for high performance and instant gratification increases, the complexity of SoCs has grown significantly. With hundreds of IPs integrated into SoCs, bugs have become more common and challenging to fix. The verification process at the SoC level is causing significant delays in tapeout schedules. Detecting bugs within the allocated budget and timeline is becoming increasingly difficult, especially with the reduced geometries and increased gate counts. With SoC design engineers spending more than 70% of their verification time, detecting a single bug takes an average of 16-20 engineering hours. Imagine the impact of having 1000 bugs in a design!

It's time to act and simplify the SoC design process to save valuable resources and ensure timely project completion. By implementing automation, new tools, and AI-based methodologies, productivity, and verification throughput can be significantly enhanced. By leveraging AI-based methodologies, SoC design and verification engineers can detect bugs faster, reduce verification time, and optimize performance across multiple engines and runs. EDA tools with AI help chip manufacturing companies achieve their goals faster and more efficiently. AI in SoC design and verification is no longer a luxury but a necessity, as it improves product quality while helping reduce development time and costs.

Cadence is revolutionizing chip verification with Verisium- the AI-driven verification platform by leveraging big data to improve overall verification throughput, specifically in debugging. Verisium is built on the Cadence joint enterprise data and AI (JedAI) platform and can aggregate verification data, including waveforms coverage, source code, log files, and more from this data.

Verisium Platform uses AI on log files, RTL and test bench churn, revision control, and waveforms to accelerate and assist debugging, reducing manual effort by up to 32X. The Verisium Debug platform also offers a new waveform format called VWDB that is significantly faster than the previous formats. The key to improving overall verification throughput is knowing where all the data is, leveraging it, controlling it, and managing it. Verisium accelerates the root cause analysis of design bugs, boosts coverage, and optimizes verification compute farm resources for complex SoCs.

With a focus on continuous improvement, Cadence offers a range of tools, including engines, verification IP, and Verisium, Leveraging the AI-powered verification platform Verisium. With apps like Auto Triage, Semantic Diff, Pin Down, and Wave Miner, Verisium accelerates and assists in debugging, reducing engineers' time on failure triage and debugging. SoC Debug with the Verisium platform has the potential for 10X improvement in debug productivity and overall verification throughput.

How Does Verisium Improve Debug Productivity and Enhance the Verification Throughput?

The Verisium Debug tool is an advanced debugging tool designed to assist design engineers, integrators, and validation engineers in exploring, analyzing, and debugging complex designs and test benches, regardless of their size, language, or origin. The tool offers several primary modes, such as exploration mode (before simulation), post-process mode (after simulation), and interactive mode (with simulation). Within these modes, users can perform various tasks, such as:

• Debug interactively while controlling the simulator steps
• Debug in post-process after recording the simulation
• Debug Palladium simulation results with on-demand signal expansion
• Investigate possible reasons the simulation reached a specific state
• Filter all messages coming from the test environment
• Debug the power intent in environments with UPF

Advantages of Verisium Debug

Debugging complex designs and testbenches with Verisium is faster and more efficient than conventional tools. Some key advantages of Verisium Debug are:

• Scalability
• Navigability
• SmartLog helps to locate the hierarchical object that caused the message and sends messages to wave
• Driver tracing – Direct access arrows in many Verisium Debug windows allow you to invoke a driver trace
• Connectivity analysis displays wire connections between the originally traced signal and the driver of that signal and allows for navigation of the trace path
• Root Cause Analysis (RCA) helps diagnose the failure's root cause

The Verisium Manager is a truly exceptional tool that provides a range of robust features for verification planning, failure triage, coverage closure, and regression management. What sets it apart is its powerful connection to the Joint Enterprise Data and Artificial Intelligence (JedAI) data and analytics platform. This integration allows for unparalleled optimization of your verification process, making it an invaluable tool for chip manufacturers seeking to streamline their operations and maximize their productivity. With its centralized regression management feature, the Verisium Manager allows for coverage aggregation across multiple sites, providing businesses of all sizes with a comprehensive and reliable solution that is both efficient and effective. Its powerful set of APIs and enterprise-grade scalability and performance enable it to seamlessly connect all the engines in your verification flow, including simulation, formal, emulation, and prototyping platforms, providing you with a comprehensive verification solution that can be tailored and optimized for maximum verification throughput. But what truly sets the Verisium Manager apart is its ability to apply AI and ML to dramatically improve debug and regression throughput productivity. By integrating directly with the intelligent Verisium Apps, this tool can help you achieve breakthrough results in your verification process, allowing you to stay ahead of the competition and achieve your business goals. In short, if you want to take your verification process to the next level, the Verisium Manager is the ultimate verification management tool you need. So why wait? Invest in the Verisium Manager today and start reaping the benefits of streamlined, efficient, and effective verification management!

Verisium Apps

Verisium Platform and related apps play a central role in improving debug productivity and enhancing the verification cycles. These apps include:

• Verisium AutoTriage: It automatically groups the failed tests due to the presence of the same bug.
• Verisium SemanticDiff: It reduces the debug time by identifying the causes of failures and helps achieve remarkable improvement in efficiency.
• Verisium WaveMiner: It helps the verifier conveniently compare and find the points in Pass and Fail cases. The waveform format best fits modern verification needs and improves the simulation probing performance 2X.
• Verisum PinDown – It keeps a tab on the edits and analyzes the relationship between simulation logs and code-check-ins.

Resources

• Cadence Revolutionizes Verification Productivity with the Verisium AI-Driven Verification Platform
• Accelerate Your Debug with Verisium - Cadence's Next-Generation Debug Solution
• Boosting Productivity by 6X by Leveraging Xcelium ML and Verisium Platforms

To learn more about Verisium Manager and the Verisium AI-driven verification platform, visit www.cadence.com/go/verisium