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Andre Baguenier
Andre Baguenier
21 Sep 2020
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Start Your Engines: A GUI to Define HDL Packages for the AMS Designer and SystemVerilog Netlister Flows Conveniently

Video

Cadence® Spectre® AMS Designer is a high-performance mixed-signal simulation system. The ability to use multiple engines and drive from a variety of platforms enables you to "rev up" your mixed-signal design verification and take the checkered flag in the race to the market. The Start Your Engines! blog series will provide you with tips and insights to help you tune up your simulation performance and accelerate down the road to productivity.

 

Bonjour!

In this post, I will cover how HDL packages in Virtuoso can be set up for use in the AMS Designer flow.

Packages are important hardware description objects for SystemVerilog, SystemVerilog-AMS, VHDL, and VHDL-AMS languages. With Packages, the designer defines and reuses common code definitions, such as functions, custom data types, etc., between models.

Prior to IC6.1.8 ISR13, HDL package handling in the Virtuoso flow was not intuitive and would require a lot of support and maintenance work in Virtuoso. In IC6.1.8 ISR13, a new Virtuoso HDL Package Setup GUI was introduced, with an improved Virtuoso flow for SystemVerilog, SystemVerilog-AMS, VHDL, and VHDL-AMS package.

The Virtuoso HDL Package Setup GUI provides two modes, basic mode, and advanced mode. Continue to read to know more about each of these modes.

Basic Mode

As shown in the figure below, the basic mode provides a minimum set of features and options to enable and set up the HDL package. 

You can also choose to enable the Universal Verification Methodology (UVM) available inside the Xcelium installation. If you describe the SoC device under test power intent with the IEEE 1801 standard command, you could also choose to enable the usage of the SystemVerilog UPF package.

The Virtuoso HDL Package Setup GUI lets the user or the CAD team do the custom packages setup for a project using an external xrunArgsCompilePKG.f file. 

In this xrunArgsCompilePKG.f file, you can define the package file path for the packages code files and the library name where the packages can be compiled with the -makelib and -endlib xrun statements.

The packages are compiled in the scratch directory, which can be shared for other tools.

Advanced Mode

As the name suggests, the advanced mode provides additional features, which include the following:

  • Ease of defining -makelib and -endlib using the GUI.
  • Ability to check the packages available in the Virtuoso libraries defined in the cds.lib file.
  • Convenience of launching the packages compilation and checking them in the GUI.

Key Benefits

The Virtuoso HDL Package Setup form is a unified and centralized GUI for setting up HDL packages for several software. The table below summaries the Virtuoso software that can reuse a Virtuoso HDL Package Setup.

 

~ Andre Baguenier

 

Related Resources

  • One-Stop Knowledge Resource for Mixed-Signal Verification
  • Spectre AMS Designer Product Page

For more information on Cadence circuit design products and services, visit www.cadence.com. 

About Start Your Engines

The Start Your Engines! series brings you blog posts from several analog/mixed-signal subject matter experts on a variety of topics, such as introduction to the new features in Spectre AMS Designer, tips for enhanced understanding of existing features, and much more. To receive notifications about new blogs in this series, click Subscribe and submit your email ID in the Subscriptions box.

Tags:
  • SystemVerilog |
  • Virtuoso-AMS |
  • mixed signal design |
  • HDL Package |
  • AMS Designer |