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Qingyu Lin
Qingyu Lin
21 May 2020
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Start Your Engines: The Why and How of Generating Spectre Netlists for Analog Blocks Using UNL

Video

Cadence® Spectre® AMS Designer is a high-performance mixed-signal simulation system. The ability to use multiple engines, and drive from a variety of platforms enables you to "rev up" your mixed-signal design verification and take the checkered flag in the race to the market. The Start Your Engines! blog series will provide you with tips and insights to help you tune up your simulation performance and accelerate down the road to productivity.

 

Did you know that AMS Unified Netlister (UNL) provides a comprehensive netlisting and binding framework for the AMS Designer-Virtuoso use model? When you run a mixed-signal design simulation from Virtuoso, UNL generates a netlist text file from the Virtuoso database and sends it to the selected simulator to run the simulation. By default, UNL generates this netlist in the Verilog-AMS format, which provides the best compatibility for parameters and port connections. However, in certain scenarios, such as pure schematics leaf branch or post-layout, netlisting the analog blocks in the Spectre format results in a more efficient elaboration process.

Let us go over a couple of typical scenarios where a mixed-signal simulation would give better results with netlist generated in the Spectre format.

Scenario 1: Mixed-Signal Post-Layout Simulation

Consider a mixed-signal design that has an extracted view as a part of an analog block. When such a design is netlisted using AMS UNL, it will generate a very large Verilog-AMS format netlist that contains all the parasitic capacitors and resistors. These capacitors and resistors go through Xcelium elaboration and are passed back to Spectre to solve. This results in significant elaboration time.

Scenario 2: Big-A-Small-D Design Simulation

Consider a design that predominantly contains analog components. Or for that matter a design, which has components mostly at the transistor level, only containing a negligible digital portion (possibly, a small stimuli block). In such cases, a netlist generated in the Spectre format will be beneficial as the Spectre format netlist will not need to go through the Xcelium elaboration process.

Using UNL to Generate a Netlist in the Spectre Format

UNL has a feature, Netlist using Spectre, using which you can specify whether you want to netlist the pure analog blocks in the Spectre format. When this feature is enabled, UNL generates Spectre format files that the Xcelium elaborator directly passes on to the analog solver.

UNLFigure 1: New UNL Netlist with the Spectre Flow

 The Netlist using Spectre feature can be enabled in the AMS Options form.

Figure 2: Enabling Netlist using Spectre in AMS Options

The Netlist using Spectre field has the following two options:

  • Pure Analog Cellviews
  • Extracted Views

Note that neither of the options is enabled by default.

When you select the Pure Analog Cellviews option, the branch having only schematic views in the design hierarchy will be netlisted in the Spectre format. On the other hand, if you enable Extracted Views, only the extracted view will be netlisted in the Spectre format. The following image illustrates how the Netlist using Spectre options work.

Figure 3: Differences in the "Netlist using Spectre" Options

On enabling either of the options and running UNL netlisting, the analog blocks will be netlisted in the pureAnalog.scs file instead of netlist.vams in the netlist directory. Then, pureAnalog.scs will be included in pureAnalogSrcfile.scs, and later included in spiceModels.scs. Following is an example :

 

Figure 4: UNL Netlist Using Spectre

As would be evident by now, using the Netlist using Spectre option saves your time and computer resources when you are working with a predominantly analog design. So, if you haven’t yet tried out this feature, try it and experience the benefits for yourself.

Qingyu Lin

 

Related Resources

  • One-Stop Knowledge Resource for Mixed Signal Verification
  • AMS Designer Product Page
  • Spectre AMS Designer and Xcelium Simulator Mixed-Signal User Guide

For more information on Cadence circuit design products and services, visit www.cadence.com. 

About Start Your Engines

The Start Your Engines! series would bring to you blog posts from several analog/mixed-signal subject matter experts on a variety of topics, such as introduction to the new features in AMS Designer, tips for enhanced working with existing features, and much more. To receive notifications about new blogs in this series, click Subscribe and submit your email ID in the Subscriptions box.

Tags:
  • AMS Designer |
  • Unified Netlister |
  • analog/mixed-signal |
  • mixed signal |
  • AMS UNL |
  • mixed-signal verification |