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Finding area of designed IC

NathS

Hi, I'm very new to this program (Cadence Custom IC design).

I'm using this program for a course in my university, and it is on a UNIX (solaris 8) environment.

The version of Virtuoso (i think) is 5.00.

As instructed, I made a library and designed inverter (cell name = inv_N1P1) by having one Nmos and one Pmos.

Now the question that prof gave is 'what is the area of this cell?'

Can anyone help me on finding the area?

I've never used UNIX and neither this program... I'll appreciate any help.

  • Hi,

    You can find the area of the cellview using SKILL, for example, with the design window open,  type the following SKILL in the CIW (the command interpreter window):

      geGetEditCellView()~>bBox

    This gives you the bounding box of the cellview from which the cellview area can be calculated. An example might be:

      bbox = geGetEditCellView()~>bBox
      times(
      abs(apply('difference mapcar('car bbox)))
      abs(apply('difference mapcar('cadr bbox)))
      )

    However, is the question asking the area of the devices, or the overall cell?

    Regards,

    Lawrence.

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