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Accessing a net from top level

Pramod
Hi All, I am using this forum for the first time though i have been using Cadence tools for sometime. I have a very basic question...(somebody might have already asked it) I have a GOLDENschematic for which I want to built a test bench in ADE.For this I built a schematic and instantiated the GOLDEN schematic in that.I added all the required stimuli for the pins available externally (through the GOLDEN symbol).Now my issue is that i need to add access a node(net) inside the GOLDEN schematic and want to put a current source on that.I don't want to change anything in GOLDEN.I tried to put the current source and label the net attached to it with . but this didn't work.While netlisting I could observe that the spectre was netlisting it like _. Can anybody guide me here,hope I am clear. Thanks, Pramod
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  • Andrew Beckett
    Pramod,

    I think you're misunderstanding how to use it.

    Place an instance of the deepprobe in your top level schematic, and set the property on the instance to the hierarchical netlist path name to which you want to connect. For example "I1.I2.intnet1" . Make sure the name matches what's in the netlist in case it got mapped from the schematic name.

    Then connect your vsource or isource to the pin on the deepprobe instance.

    The deepprobe component instantiates an "iprobe" between the net connected to the pin and the internal net specified by the property. An iprobe is just like a zero volt source, so this is effectively a short through levels of hierarchy.

    If you just name a net in a schematic with a hierarchical name (as you've tried), then in Virtuoso it doesn't mean a hierarchical reference, so it would be quite wrong to netlist it as such in spectre. Otherwise you could easily simulate something different than you lay out or LVS. So the the spectre netlister maps the name to prevent this. Deepprobe however is deliberately a simulation-only component (it will fail to netlist in other netlisters) so that's then ok, provided it's used with care.

    Regards,

    Andrew
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  • Andrew Beckett
    Pramod,

    I think you're misunderstanding how to use it.

    Place an instance of the deepprobe in your top level schematic, and set the property on the instance to the hierarchical netlist path name to which you want to connect. For example "I1.I2.intnet1" . Make sure the name matches what's in the netlist in case it got mapped from the schematic name.

    Then connect your vsource or isource to the pin on the deepprobe instance.

    The deepprobe component instantiates an "iprobe" between the net connected to the pin and the internal net specified by the property. An iprobe is just like a zero volt source, so this is effectively a short through levels of hierarchy.

    If you just name a net in a schematic with a hierarchical name (as you've tried), then in Virtuoso it doesn't mean a hierarchical reference, so it would be quite wrong to netlist it as such in spectre. Otherwise you could easily simulate something different than you lay out or LVS. So the the spectre netlister maps the name to prevent this. Deepprobe however is deliberately a simulation-only component (it will fail to netlist in other netlisters) so that's then ok, provided it's used with care.

    Regards,

    Andrew
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