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Accessing a net from top level

Pramod
Hi All, I am using this forum for the first time though i have been using Cadence tools for sometime. I have a very basic question...(somebody might have already asked it) I have a GOLDENschematic for which I want to built a test bench in ADE.For this I built a schematic and instantiated the GOLDEN schematic in that.I added all the required stimuli for the pins available externally (through the GOLDEN symbol).Now my issue is that i need to add access a node(net) inside the GOLDEN schematic and want to put a current source on that.I don't want to change anything in GOLDEN.I tried to put the current source and label the net attached to it with . but this didn't work.While netlisting I could observe that the spectre was netlisting it like _. Can anybody guide me here,hope I am clear. Thanks, Pramod

  • Look at sourcelink solution 11017972 - this gives a component "deepprobe" which allows you to do this for spectre.

    Regards,

    Andrew.

  • Hi Andrew,

    Thanks for the quick reply!
    I will try the "deepprobe" component.

    Pramod
    LSI
  • Hi Andrew, I tried this and could see that this allows only probing. The original solution link also mentions it for probe. But i want to access it at top level and need to connect a voltage/current source.This i was not able to do with deepprobe. Whenever i connect a source with net name . it puts it as _ in netlist. Thanks, Pramod
  • Pramod,

    I think you're misunderstanding how to use it.

    Place an instance of the deepprobe in your top level schematic, and set the property on the instance to the hierarchical netlist path name to which you want to connect. For example "I1.I2.intnet1" . Make sure the name matches what's in the netlist in case it got mapped from the schematic name.

    Then connect your vsource or isource to the pin on the deepprobe instance.

    The deepprobe component instantiates an "iprobe" between the net connected to the pin and the internal net specified by the property. An iprobe is just like a zero volt source, so this is effectively a short through levels of hierarchy.

    If you just name a net in a schematic with a hierarchical name (as you've tried), then in Virtuoso it doesn't mean a hierarchical reference, so it would be quite wrong to netlist it as such in spectre. Otherwise you could easily simulate something different than you lay out or LVS. So the the spectre netlister maps the name to prevent this. Deepprobe however is deliberately a simulation-only component (it will fail to netlist in other netlisters) so that's then ok, provided it's used with care.

    Regards,

    Andrew
  • Hi Andrew, :-( Oh...my bad...I was trying the exactly same think which you were explaining. But due to my mistake i was labelling the instance as IO instead of I0 (Izero). This was causing me to fail the purpose.I could see it was working well with the test schematic (testit) provided with the sourcelink bundle. Anyway things are working fine for me now. Thanks a lot for the help! Looking forward for more. Pramod LSI Corp

  • Hi Andrew,

    I am not able to find this sourcelink '11017972'. I am also not able to find any discussion thread explaining how to use this 'deepprobe'. Kindly help & direct me to the corresponding source of explanation.

    Regards,

    Venkat 


     

  • Log in to support.cadence.com and search for deepprobe.

  •  How do we handle arrays? We get an array when we try to access a node within an instance like

     

    Xtop.Xnest.Xcell<3>

     

    Thanks!

  • I presume you are saying you are getting an "error" (not "array") when you are trying to use deepprobe with such a net? First of all, you need to find out what that net is called in the netlist, becaue the parameter for deepprobe is the name in the netlist. If in IC61, you may have the net shown as Xcell\<3\>, in which case you might have to enter (I think) Xtop.Xnest.Xcell\\<3\\> (i.e. two backslashes) because otherwise one will get escaped. Not 100% certain (and I'm afraid I don't have time to make the experiment). Anyway, experiment around this and see what happens.

    Regards,

    Andrew.

  •  Right on both counts. Thanks.

     xand\<1\>.A\<0\>

     is how you handle a bussed net within an arrayed instance.

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