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symbol view for VHDL structures

PrachiB

Hello all,

I am trying to use symbols created from my VHDL cells in other schematics and simulate those structures.

Currently, I am using options FILE->NEW->CELLVIEW to create symbols for VHDL cells (which already have cellviews, entity and behavioral). Then I use those symbols in other schematics. When I create testbench for this schematics (using VHDL toolbox) and simulate using simvision. I an not getting any output.

It seems that symbols which I am creating for my basic VHDL cells do not carry its architecture. How can I create symbol cellview from my entity or behavioral cellview, which shows its properties.

Please refer my earlier post on this subject: ncvhdl8.2 - can I create symbols for my VHDL structures and use them in schematics.

Thank you in advance,

Prachi

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