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Ultrasim partitioning guidelines

paulaos

I have a circuit with multiple 3.3V power domains and multiple 1.8V and 2.4V regulators. Regulator biases come mainly from one bias block on a 3.3V supply.I have defined the regulated output voltages with usim_vr statement. I've also put sim_mode=ms and speed=2 on the regulator blocks themselves.

I thought that this would mean that each regulator would be partitioned in it's own partition - but what seems to happen is that all of the regulators (and some of the analog bias blocks etc) are getting lumped into one large partition.

What can I do to make it partition more cleverly?

Where can I go to see other people's  tips and tricks? I've read the manual - but I think some tips and tricks from experience would be really useful.

 

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