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MOS capacitances

flying

After simulating one MOS transistor, the Results will provide ids and 16 intrinsic caps like cgs and cgd.

I feel strang 'cause they are all negative.

please help me to figure it out!

Parents

  •  In most of the analytical transistor models, the capacitance is the derivative of terminal charge to corresponding voltages.

    If I sweep the Vds and Vgs for one transistor, then I can get the 2D cap (like Cgs and Cgd) tables with respect to different Vgs and Vds. 

    Normally the MOS transistor can be modeled as a current source and those intrinsic caps, In spectre/Spice, the terminal charge is used in MNA equations. The compact form is dQ(V)/dt + I (V)=0. since Q=CV, the equation can be write as d(CV)/dt+I(V)=0. So if I can get the cap value then simulation still can work.

    I read some papers about table-based transistor model and corresponding simulators, the caps are modeled either by analytical expressions or charge tables, no cap tabless.could you explain it to me? I really feel confused.

Reply

  •  In most of the analytical transistor models, the capacitance is the derivative of terminal charge to corresponding voltages.

    If I sweep the Vds and Vgs for one transistor, then I can get the 2D cap (like Cgs and Cgd) tables with respect to different Vgs and Vds. 

    Normally the MOS transistor can be modeled as a current source and those intrinsic caps, In spectre/Spice, the terminal charge is used in MNA equations. The compact form is dQ(V)/dt + I (V)=0. since Q=CV, the equation can be write as d(CV)/dt+I(V)=0. So if I can get the cap value then simulation still can work.

    I read some papers about table-based transistor model and corresponding simulators, the caps are modeled either by analytical expressions or charge tables, no cap tabless.could you explain it to me? I really feel confused.

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