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import verilog

eppo
Hi, I use the TSMC 65nm Design-Kit and I have a problem when I want to import a file in verilog. In fact, I get the following error: ncvlog: *W,DLNOHV: Unable to find an 'hdl.var' file to load in. Also, in reference libraries it does not recognize the sample library. I have a message telling me that : ' Library (sample) not initialised in the database. Is someone can help me? Regards, M.A. Bounouar
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  • So are you trying to use File->Import->Verilog? Note that if your code contains includes to "disciplines.vams" then it is Verilog-AMS not Verilog, and hence File->Import->Verilog is not intended for that.

    You could create a new cellView (using Verilog AMS editor as the tool), or use the command line "ncvlog -use5x -ams -lib libName -view viewName /path/to/code.vams" to import it (fill in the italicised bits appropriately).

    Regards,

    Andrew.

Reply

  • So are you trying to use File->Import->Verilog? Note that if your code contains includes to "disciplines.vams" then it is Verilog-AMS not Verilog, and hence File->Import->Verilog is not intended for that.

    You could create a new cellView (using Verilog AMS editor as the tool), or use the command line "ncvlog -use5x -ams -lib libName -view viewName /path/to/code.vams" to import it (fill in the italicised bits appropriately).

    Regards,

    Andrew.

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