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  3. Question regarding the bulk terminal of NMOS

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Question regarding the bulk terminal of NMOS

tester
tester over 15 years ago

Dear All,

I am using IC 5.1.41 for schematic, Virtuoso XL layout, and Jazz CA18 design kits, and the following is the problem:

During the layout drawing for NMOS, I generator the nmos from schematic. By looking at all the possilbe layers of LSW, I have noticed that there is only "nwell" selection but no "pwell" selection. I guess that this is nwell-process. Since the drain, source, and gate were generated automatically from schematic, (and the bulk did not), I assume that the whole backgroud should be the bulk. In my design, I have several NMOSs, but I just used one PTAP and connected to "gnd!" throughtout "metal1". By doing so, I thought it would take care of all the bulk drawing of NMOSs. Later, I tried to run connectivity->check->against source and then connectivity->update all the options over there. Unfortunately, I still got the following error message:

***********************************************************

Layout instance '|M4' is missing expected instance terminal 'B'

.....

************************************************************

The things that I omitted is the repteated identical messages with different NMOS names. Could anyone give me any hints please? Thanks.

 

 

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  • Andrew Beckett
    Andrew Beckett over 15 years ago

    Tester,

    Without having familiarity with that design kit, hard to know. The best thing would be to log a service request via http://support.cadence.com and then somebody can work through this with you.

    Regards,

    Andrew.

     

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