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Running APS with VerilogA and bsource modules

fomin

In Virtuoso Accelerated Parallel Simulator User Gide I found the following statement:

When running APS, the VERILOGA and BSOURCE modules are forced to be compiled. Because of this, setting the value CDS_ADHLCMI_ENABLE NO has no effect. Also, the command line arguments -ahdlcom and -bsrccom don't produce any result.

Does that mean APS doesn't support VERILOGA and BSOURCE modules? Some foundries use BSOURCE for resistor models. (TSMC 0.18u, for example) 

 

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  • No, it means that veriloga and bsource components are always compiled. Since the purpose of compilation is to make the simulation faster, it would be a bit odd to use APS (which is intended to be an optimised, fast, accurate simulator) and not take advantage of model compilation.

    I'm not sure how you could read this statement and come to the conclusion that veriloga and bsource are not supported!

    Regards,

    Andrew
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  • No, it means that veriloga and bsource components are always compiled. Since the purpose of compilation is to make the simulation faster, it would be a bit odd to use APS (which is intended to be an optimised, fast, accurate simulator) and not take advantage of model compilation.

    I'm not sure how you could read this statement and come to the conclusion that veriloga and bsource are not supported!

    Regards,

    Andrew
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