Problem in running LVS in Assuran

 Firstly you're using a version of the kit that is nearly 3 years old. The PDK is up to V1.7.X.X last I used it. From there on you need Assura-41 for DRC/LVS and EXT91 for extraction.

Thanks for the reply.

You're right. On the new server I have access to PDK version,V.1.8.0.1 also. But, because on the former server(as I explained in my first posting), I created the schematic and layout using kit version 4, I'm continuing working with that version on the current server. Actually, I tried to set the configuration to newer design kits (compared to version 4) by changing the cds.lib, and .cdsenv files to point to new kits, but it gives error and doesn't open even the schematics of my circuit which its library had been created by V1.4.0.7DM. Do, you think that we can open libraries which have been created with older design kits with newer design kits. If No, so, still my problem in my first posting is remained. Why I get those errors in lVS?

Best

Behrooz

i have not used V1801DM myself, but in my experience with V1701DM:

1. if you are using IC5141, make sure your new cds.lib points to the .../cdslib51 folder and not .../cdslib as the former is for CDB and the latter is for OA.

2. you need to update your simulation files to include the "section" parameter, it is no longer set in the .scs file itself.

these changes are explained in detail in the documentation. as far as your lvs issues go, i don't know. perhaps Zach will be able to help you on that one.

Also are you doing Assura LVS CDL mode or VLDB mode? The PDK requires you make a CDL netlist (creates cellname.netlist), use the CDL preprocessor (creates cellname.netlist.lvs), and use the latter as the schematic netlist source in Assura CDL mode.

Hello,

 Thanks alot for the reply.

Well, I tried to do all the steps that you kindly offered. First, I don't see any cdslib51 in kit version V1.4.X.XDM. I do see that in newer kit version though (version 6, 7,8). So, I'm sticking to cdslib. For "section" parameter, I don't get it completely, but I tried to add some other model libraries, in ADE, besides "allmodels.scs", like "design.scs",.., but then simulation gives errors. I know that in newer technologies like CMRF9Sf, we need to add them, but am not sure about 8sf. Again I don't know whether I got your suggesstion, correctly.

 About cdl format, I changed compare and binding rules from vldb to cdl, in LVS setup window, but sttill am seeing those errors in running LVS. You suggessted to talk to Zack, could you please tell him, have a look on my problem.

Truly Yours

Behrooz  

As I mentioned those were my experiences with V1701DM, not V14XXDM, and everything is elaborated in the release notes. Do not add design.scs if you using V14XXDM, only in V17XXDM (and newer).

Zach posts on this forum as well and if you're lucky he will look at this thread and shed some light on your problem. Otherwise if you are a MOSIS customer you can file a support request and one of their engineers will address your case.

First of all, forget about and delete V14xx.  That is years old.  The cardinal rule with IBM design kits is to use the most current version.  The model file methodology changes from time to time (PDK to PDK).  You need to review the Spectre release notes located in the Spectre/doc directory in the PDK to determine the supported version, then find the Spectre setup information in the model reference guide located in the /doc directory to determine what files are needed.  Regards, Zach.

Thanks Zach for the reply.

But as you have read, in my former posting, I'm doing DRC/LVS/RCX on a library which has already been created with design kit V1.4.0.7DM. I tried to change the design kit with settings pointing to newer ones, but then even I can't open ADE, it freezes. Can we simulate a schematic, created with an older design kit, with a newer version? I can't draw the whole circuit and layout from begginig, as circuit and layour are pretty big.

Regards

Berhooz 

I never had issues working with old designs when kits were upgraded, so I don't know why your ADE is freezing. Maybe upgrade your IC to latest ISR in case there is a bug?

What did you do to "change the design kit with settings pointing to newer ones" ? All you really need to do to change which kit you are using is change where the rel@ symbolic link points to... Refer to spectre user guide for how to specify the model files in the newer kits. If you really want to play it safe, make a new working directory and copy .cdsinit, .cdsenv and cds.lib from the V18XXDM folder over, and add your existing designs to cds.lib. Be sure that you are using the tool versions specified in the various release notes.

Hello agian,

I upgraded cadence version from USR5 to ISR, but still ADE freezes.

What I do is that I change the cds.lib, to point to newer design kits, and also I change the .cdsenv files. Actually, I have attached those files in addition to my assura_tech.lib to this email, because this is much more effective if you have a look on files, possibly I'm missing something there. Please let me know if you want my .bashrc file also.

One important point. I just saw that if in the RSF include section of LVS setup window, instead of LVSinclude.rsf, I put deviceinfo.rul, LVS works and layout passes the LVS but then RCX, gives error in "capgen". As I told the assura_tech.lib file is attached 

I went to Spectre manual and didn't see anything regarding rel@symbolic link, so if it's different from what I have done in attcahed files, please let me know.

Regards

Behrooz Nakhkoob