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How to add drain/source area & perimeter "ad as pd ps" of MOSFET in creating Spectre netlist in Analog Design Environment?

Paulux

Hello,

 May I ask how to add drain/source area & perimeter "ad as pd ps" of MOSFET in creating Spectre netlist in Analog Design Environment? (i.e. e.g. x1 (d g s sub) nmos w=2u l=2u ad=5p as=5p pd=5u ps=5u). Since I only have one NMOS & PMOS instances with symbol, hspice & spectre views only and their CDF can only generate x1 (d g s sub) nmos w=2u l=2u. I can only find the parameters for calculating "ad as pd ps" from the design rule document and do not have any PDK file. Would you please help to show how to add these "ad as pd ps" in details or step-by-step?

If I post this message to wrong forum, could you please kindly help to move to proper forum and let me know?

Thank you very much for your help & kindness.

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  • You could have additional (non-readable, non-editable) parameters in the CDF which define the constants, and then refer to them with iPar(). They could be editable, but it would be a pain to have to keep editing them per-instance though.

    There are lots of ways you could handle this - but effectively people normally have a PDK to contain any technology specific mapping - even if it's a PDK you create yourself - rather than having a device which works for any foundry.

    Andrew.

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  • You could have additional (non-readable, non-editable) parameters in the CDF which define the constants, and then refer to them with iPar(). They could be editable, but it would be a pain to have to keep editing them per-instance though.

    There are lots of ways you could handle this - but effectively people normally have a PDK to contain any technology specific mapping - even if it's a PDK you create yourself - rather than having a device which works for any foundry.

    Andrew.

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