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Jitter in autonomous oscillators due to power supply noise

Simona

Hi everybody,

I need to simulate cycle-to-cycle jitter of a relaxation oscillator taking into account also the power supply noise. This oscillator, indeed will be supplied by an LDO which will supply also a processor running at the same oscillator frequency. Therefore I would like to estimate cycle-to-cycle jitter induced on the oscillator by the noisy LDO output.

I followed the procedure to simulate phase noise and clock jitter in autonomous circuit described in "Jitter Measurements Using SpectreRF Application Note" using PSS and Pnoise simulation on the oscillator alone (with an ideal power supply) and found a value for Jcc jitter which presumably accounts for device noice. Then I modeled the impedance of the power supply, but I got the same result as before.

How could I account for power supply noise too? Do I need to use a different test bench or run different simulations?

Thank you in advance for your help.

Simona

Parents

  • Hi, 

    I tried also following the procedure suggested by Frank Wiedeman (on Designer's Guide Community Forum), i.e. sampled pxf then dividing the results by the slope of the output clock at the threshold crossing. Not sure to have set up the sampled pxf correctly:

    I place a Port on the power supply with a DC source and PAC=1. (I used a 1 Ohm output impedance and regulate the DC to have the desired voltage on the supply).

    1. Run PSS in oscillator mode: adjusting tstab I achieve convergence after 3 iterations (oscillation frequency is 10 MHz)

    2. PXF:
        sweeptype: absolute
        Logsweep from 1 kHz to 100 MHz, 20 pts per decade
        Sidebands: 0
        Output voltage: Clock out
        Specialized analysis: Sampled
        Signal: voltage --> Clock out; Threshold: vdd/2; Crossing direction: All

    3. Plot: PXF: magnitude and select the Port on VDD as input source; Then divide the achieved plot by the derivative of the output clock (resulting from PSS) at the threshold crossing and got a plot of jitter (for a unit disturbance on the power supply).

    Is this procedure correct?

    My problem is that the results I achieve do not match at all with the results of jitter calculated from transient simulations made applying sinewave disturbances at different frequencies on the power supply. I calculate the period of the output clock using 1/"freq" function of the calculator. In this way I got the period of the output clock as a function of time. Then I calculated the deviation from the ideal period --> the jitter. I assume also this procedure should be correct.

    Could you help me understand why I get completely different results?

    Thank you in advance

    Simona   

     

     

Reply

  • Hi, 

    I tried also following the procedure suggested by Frank Wiedeman (on Designer's Guide Community Forum), i.e. sampled pxf then dividing the results by the slope of the output clock at the threshold crossing. Not sure to have set up the sampled pxf correctly:

    I place a Port on the power supply with a DC source and PAC=1. (I used a 1 Ohm output impedance and regulate the DC to have the desired voltage on the supply).

    1. Run PSS in oscillator mode: adjusting tstab I achieve convergence after 3 iterations (oscillation frequency is 10 MHz)

    2. PXF:
        sweeptype: absolute
        Logsweep from 1 kHz to 100 MHz, 20 pts per decade
        Sidebands: 0
        Output voltage: Clock out
        Specialized analysis: Sampled
        Signal: voltage --> Clock out; Threshold: vdd/2; Crossing direction: All

    3. Plot: PXF: magnitude and select the Port on VDD as input source; Then divide the achieved plot by the derivative of the output clock (resulting from PSS) at the threshold crossing and got a plot of jitter (for a unit disturbance on the power supply).

    Is this procedure correct?

    My problem is that the results I achieve do not match at all with the results of jitter calculated from transient simulations made applying sinewave disturbances at different frequencies on the power supply. I calculate the period of the output clock using 1/"freq" function of the calculator. In this way I got the period of the output clock as a function of time. Then I calculated the deviation from the ideal period --> the jitter. I assume also this procedure should be correct.

    Could you help me understand why I get completely different results?

    Thank you in advance

    Simona   

     

     

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