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Confused TechFile & Simulation

eactor
Hello,
I designed my own transistor layout by coding a SKILL pcell. The next thing should be a own spectre modle, but the only thing I can do right now is:
-create a schematic view for my layout which would include a transistor out of my techfile
Normaly I thought I would connect some kind of spectre netlist, which includes my verilog modlue, to the Layout CellView, but maybe thats a totally wrong approach?
cheers Paul

ps hopefully not to messed up

  • Hi Paul

    Actually there is no need to link a spectre netlist to a layout. A spectre netlist is for simulation. : )  You can link a cdl netlist or a schematic to a layout. I don't quite understand your question so perhaps you might want to provide more info on the issue which you are facing.

    Best regards
    Quek

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