K.C.

You don't need to create a hierarchy editor template (assuming that's what you're talking about) to allow auCdl netlisting. All you need to do is to copy the symbol of your nfet to a view called "auCdl" (to act as the stopping view) and then edit the Base CDF for your nfet cell to ensure it has the auCdl simulation information set up (and looking at nmos4 in analogLib as a basis would be a good start).

The hierarchy editor template is only needed if you're going to netlist from a config view - and even then it's not required. You only need a template if you want to make life easier for a user so they don't have to specify the default switch and stop list for the config when they create it - but since you don't need a config to netlist to auCdl, this is probably overkill...

Andrew.

Hi Andrew,

In fact the problem I have is that during auCdl netlisting 3V MOS are still netlisted as 1.8V MOS. I think the subtype must be ND for 3V NMOS but it is the same as 1.8V NMOS (NM) in the netlist. I noticed that 3V MOS did not had auCdl view even if their CDF sim info are set for auCdl. So I added the auCdl view by copying the symbol, but the problem is still the same.

For example I got this description both for a nfet and a 3Vnfet : MM80 VSS VSS VSS VSS NM W=4u L=1.0000u m=1

 any idea ?

 Thanks!!

 K.C.

You need to change the contents of the auCdl sim info in the CDF.  Change the modelName to what you want the subType to be.

Regards,

Andrew.

Hi Andrew,

That works fine now ! Thanks a lot.

 Regards

K.C.