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Monte Carlo in ADE XL error

syen

Hi,

When I try running a nominal simulation (single run) on the simple resistor model (in "Cadence Verilog-A Language Reference", Version 6.1, Dec. 2006, pages 55-56) using ADEXL, I get this fatal error message:

   ERROR (SFE-2): "input.scs" 15: `I0': Attempt to override value of inherited parameter `monteresMINE' when instantiating a subcircuit.

where monteresMINE is the monteres in the Verilog-A reference mentioned above.

My goal is to run a MC simulation, hence the need for the statistical parameters.

I included the library for the statistical variations in the "Model libraries..." box under Setup. I ran the identical simulation using Virtuoso 5.1, and it ran just fine.

I'd appreciate any pointers you may have. Thanks!

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