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CDL in using virtuoso.

sandeepsriram

 Hi,

     Below is my cdl.

 .subckt AN2x4 A2 Z VDD VSS
MM6 net26 A1 VDD VDD pch_mac lgb=35n w=0.52u multi=2
MM7 net26 A2 VDD VDD pch_mac lgb=35n w=0.52u multi=2
MM4 Z net26 VDD VDD pch_mac lgb=35n w=0.52u multi=4
MM0 net027 A2 VSS VSS nch_mac lgb=35n w=400n multi=1
MM1 net26 A1 net027 VSS nch_mac lgb=35n w=400n multi=1
MM9 net14 A2 VSS VSS nch_mac lgb=35n w=400n multi=1
MM8 net26 A1 net14 VSS nch_mac lgb=35n w=400n multi=1
MM5 Z net26 VSS VSS nch_mac lgb=35n w=0.4u multi=4
.ends

 

My dev.map is

devSelect := nch_mac nch_mac
propMap :=  lgb l

devSelect := pch_mac pch_mac
propMap :=  lgb l

 

I am able to read "length" "width" and "multi" parameter  , but while displaying it uses default values and not the one that is supplied in the design.

Shpuld I post process using skill or there is some issue in cdf parameters.

 

Cheers,

Sandeep.

 

  •  Hi Sandeep,

    I only see one parameter in the propMap, do you need to map the others?  Also, are you importing this as Spice, CDL, Spectreor Hspice? This has an impact on importing the parameters (see the section on the Input tab: "Look for Device Information in:", read from either the devMap or from the simInfo section in the cell's CDF).

    Sounds like your parameters are coming in as user properties, rather than being mapped to the appropriate CDF property.

    Regards,

    Lawrence.

  •  

    Hi Lawrence,

     Thanks for the quick reply. here is my log sheet:

    Importing SUBKCT 'AN2D4BWP12T35' in Library 'some_lib'
        Subckt Pin: Created net A1.
        Created Subckt Terminal A1.
        Subckt Pin: Created net A2.
        Created Subckt Terminal A2.
        Subckt Pin: Created net Z.
        Created Subckt Terminal Z.
        Subckt Pin: Created net VDD.
        Created Subckt Terminal VDD.
        Subckt Pin: Created net VSS.
        Created Subckt Terminal VSS.
        Subckt termOrder created in CDF
    No subckt parameters for this module
        Instance: MM6
        Instance has master: 'pfet' model/subtype: 'pch_mac'

            Master Cell 'pfet[pch_mac]' mapped to 'pch_mac'.
            Master Cellview: 'tsmcN28.pch_mac:symbol' found.
        Created instance 'MM6'.
            Instance Terminal: Created net net26
            Created connection between net 'net26' and term 'D'
            Instance Terminal: Found net A1
            Created connection between net 'A1' and term 'G'
            Instance Terminal: Found net VDD
            Created connection between net 'VDD' and term 'S'
            Instance Terminal: Found net VDD
            Created connection between net 'VDD' and term 'B'
            CDF parameter not found for 'subtype'. User property will be cretated
            Created propName='subtype'; propType='string'; propVal='pch_mac'.
            In CDF...        Created propName='model'; propType='string'; propVal='pch_mac'.
            CDF Type is 'string' and the value given in netlist is 'float' - hence converting to 'string'
            In CDF...        Created propName='l'; propType='string'; propVal='3.5E-08'.
            CDF Type is 'string' and the value given in netlist is 'float' - hence converting to 'string'
            In CDF...        Created propName='multiwd'; propType='string'; propVal='5.2E-07'.
            CDF Type is 'string' and the value given in netlist is 'float' - hence converting to 'string'
            In CDF...        Created propName='multi'; propType='string'; propVal='2'.
        Instance: MM7
        Instance has master: 'pfet' model/subtype: 'pch_mac'

    As you said it is true, it is importing as user property. How should I go for CDF property import.

     

    Cheers,

    Sandeep.

  •  Hi lawrence,

      Anything I can do about it. I am importing as CDL.

     

    Sandeep.

     

  • Which version of Virtuoso are you using?

  • Hi Andrew,

          Gopi, from cadence solved the issue. Thanks for the response.

     

    Cheers,

    Sandeep.

  • I am able to import spice/cdl files, but is there anyway to indicate the port-direction that should be used for the schematic generation? I am using IC 6.1.5

  • This is covered in the Design Data Translator's Reference manual (<ICinstDir>/doc/transrefOA/transrefOA.pdf as an alternative to looking in cdnshelp) in the section Importing the Sub Circuits List

    Andrew.

  • Thanks Andrew - That worked a treat! *PININFO Y:O A:I
  • in reply to sandeepsriram

    Hi Sandeep,

    I am having the same issue. How did you solve this?

    Thanks,

    Tim

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