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Floating Gate MOS.

Muffassir

 Hi all,

I am going to use floating gate mos in my design if Neurons.So floating gate is a device that have two gates out of which 1 is floating..

 

I am using gpdk180 library and analog library..

I dont fing this device in these libraries to draw the schematic . So if any one knows how to draw schematics of the circuits having Floating Gate MOS.Also in the layout i dont find Poly1 and poly2 in the LSW window...So please help me out ......if posiible please provide me with the snapshops if available..

 

 

Thanks in advance!!

 

  • Hi Muffassir

    I think you are most probably aware that Cadence generic pdk (gpdk) is for training/acadamic purposes and not for actual design. It only has 1 poly and standard mos, res, cap, etc devices. If it is really necessary to use the gpdk, you can dump out the techfile and add another poly. If you intend to have a tape out for your design, please contact the relevant foundry for a pdk. : )

    Best regards
    Quek

  •  Thanks for ur reply ...i am newbei to cadence.....

    Can u please elaborate how to dump tech file and use another poly ..wht u mean by this and how to do tht..please metion in detail......

    Well if u know something on how to do floating gate MOS circuit schematics in schematic editor it would be welcomed....

     

     

  • Hi Muffassir

    You can dump out the techfile as follows:
    a. In CIW (first window that starts up when you launch Virtuoso), go to "Tools->Technology File Manager"
    b. Select "Dump"
    c. In the form, select your pdk library and enter a suitable file name. Select all sections
    d. Press OK

    As for adding another poly layer, you will need to make a number of modifications at different locations in the techfile so I think it would be better if you can get more help from your local Cadence support centre. : )

    Best regards
    Quek

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