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post layout simulation issues

gnangotzi

Dear, 

I have a problem with post layout simulations. DRC, LVS and  RCX were succesfully done with assura41.

Then I created a config view for my testbench and I set the av_extracted view to be used  for simulation.

However, the generated netlist do not include the pins of the DUT (but the parasitics are there) and the respective subckt has no inputs and not even outputs. Pins were generated on the layout view using the assura utilities menu: HIT-KIT utilities -> create labels

with kind regards

Gian Nicola

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