• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
  3. Cadence DRC check to measure width

Stats

  • Locked Locked
  • Replies 3
  • Subscribers 125
  • Views 14083
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Cadence DRC check to measure width

windowsdee
windowsdee over 13 years ago
Hi, Is there any DRC rule which measures width to check if it is even number? please let me know, thank you
  • Cancel
  • Andrew Beckett
    Andrew Beckett over 13 years ago

    Please can you read the Forum Guidelines before posting? If you re-read your question, there are a large number of unknowns here which make it very difficult to answer. The clearer your question, the more likely it is that somebody can give you a clear answer.

    Which DRC tool are you talking about? If it's an IC tool, it could be:

    1. Diva
    2. Dracula
    3. Assura
    4. PVS
    5. Chameleon
    6. Calibre (not a Cadence tool)
    7. Hercules (not a Cadence tool)
    8. several others

    Or maybe you're talking about the DRD (Design Rule Driven) checking tool part of Virtuoso Layout Suite XL? Or maybe it's not even an IC tool at all?

    Which version are you talking about? 

    When you say "even number", what do you mean? Even number of what? Microns, nanometers, grid units, elephants, bananas? (sorry to be cheeky...)

    Why do you need to check this? It seems an odd requirement.

    Kind Regards,

    Andrew.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • windowsdee
    windowsdee over 13 years ago

    Hi Andrew,

    Sorry for a poorly described question.

    I am working on layout design verification using Assura DRC tool version 317.USR2

    I wanted to check for the width of a metal which has to be an even number of microns as per design rule. I wanted to know if there is any assura DRC rule which checks for this condition and returns me a failure message when it is not even.

    I hope I am precise about my point here.

    Please let me know if you could help me.

    Thank you,

    Deepthi.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Andrew Beckett
    Andrew Beckett over 13 years ago

    That's a very odd rule (especially as an even number of microns would suggest rather large geometries in modern technologies). It sounds as if you need something like offGrid()? (See the Assura Command Reference Manual for more detail)

    Andrew.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information