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IC6.14, Issues with Hierarchy in schematics

Kabal

 Lets say i have inverter which passed good DRC and LVS. Now i create another project, and instantiate those inverters in schematics and layout, and interconnect them.

 

Problem is that in schematics XL, when i choose from my PDK, Netlist->Create CDL Netlist, it spits out error like this:

 *WARNING* envCyclicStringToIndex: could not find variable 'wireViaParamCalcMode'
    in tool[.partition] 'layout'
*WARNING* envSetVal: Can't set the value of variable 'wireViaParamCalcMode',
    in tool[.partition] 'layout' - it has not been registered.
Running Artist Hierarchical Netlisting ...
*Error* _emsGetMsg: argument #5 should be a list (type template = "ooxtl") - "/home/user1/cadence/testlib/ring5/netlist"

 

As you see there is something it doesnt like about hierarchy, because when i export schematics of inverter with just transistors and no instantiated elements, the netlist file is being created successfully.

 

so what could be a problem there?

 

 

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