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Automatic schematic generation using SKILL

shamore

Hello,

I am currently using Cadence version IC6.1.5.500.8. I am a regular user of Virtuoso Schematic Editor. However I don't have any experience related to automation in Schematic editor.

I am currently designing an IC that has around 15 - 20 IO Pads. Between each of these Pad's and internal logic (input or output) port, series of buffers (50-200) needs to be placed. I have the information related to the number of buffers corresponding to each Pad in an excels sheet. Doing this work manually is very boring and also tiring?

Would you kindly advice if its possible to automate the placement of buffers in the schematic between two signals based on the information provided via text file or .xls file.

Thanks and Best Regards,

Shailesh 

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