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Cannot pass parameters from virtuoso sch. into Verilog module

Pavel47

 Hello,

 I've met problem while passing parameter value, specified on the schematic.

Here is Verilog module:

module Pixel_v0 (input Din, CLK, output Dout );
   parameter SEED = 33;
   integer INTSEED=SEED;
   reg [15:0] DATA;
   assign Dout = DATA[15];

//   initial DATA = $random(INTSEED);
   initial DATA = INTSEED;
  

   generate
      genvar  i;
      for (i = 0; i < 15; i=i+1) begin: DFF
     if (i==0)
       always @(posedge CLK)
         DATA[i] <= Din;
     always @(posedge CLK)
       DATA[i+1] <= DATA[i];
      end
   endgenerate

endmodule

On the picture on attachment I shoved concrned instance (with parameter value = 15) and signal waveform. As you can constate, the initial DATA value is 33 (as spicified inside of verilog module), but not 15 (as sppecified in schematic).

Where is a problem.

Thanks in advance.

Pavel. 

Parents

  •  Thanks for answer Andrew,

    I googled for a solution and found a hint on the Designer's Guide Forum. Here is it:

     You can either do it through the library manger or through SKILL.

    Lib. Mgr.:
    - Right Mouse click over the desired view
    - Properties
    - [Edit -> Create...]
    - View Property Editor
    - Add
    - hnlVerilogCDFdefparamList <dataType> <value>

    SKILL:

    d_cvId = dbOpenCellViewByType( t_libName t_cellName t_viewName nil "a" )
    dbCreateProp( d_cvId "hnlVerilogCDFdefparamList" "<dataType>"  <value> )
    dbSave( d_cvId )
    dbClose( d_cvId )

    Bern

    Concerned cell has 2 views - symbol and verilog. Where should I add hnlVerilogCDFdefparamList propery ?

    In the initiall message the guy mentionned that  hnlVerilogCDFdefparamList must be added on the switched master of the instance cell. Unfortunately I ignore what doest switched master mean. The post dates 2007, so it's improbable, that I will be answered.

    Regards.

    Pavel.

Reply

  •  Thanks for answer Andrew,

    I googled for a solution and found a hint on the Designer's Guide Forum. Here is it:

     You can either do it through the library manger or through SKILL.

    Lib. Mgr.:
    - Right Mouse click over the desired view
    - Properties
    - [Edit -> Create...]
    - View Property Editor
    - Add
    - hnlVerilogCDFdefparamList <dataType> <value>

    SKILL:

    d_cvId = dbOpenCellViewByType( t_libName t_cellName t_viewName nil "a" )
    dbCreateProp( d_cvId "hnlVerilogCDFdefparamList" "<dataType>"  <value> )
    dbSave( d_cvId )
    dbClose( d_cvId )

    Bern

    Concerned cell has 2 views - symbol and verilog. Where should I add hnlVerilogCDFdefparamList propery ?

    In the initiall message the guy mentionned that  hnlVerilogCDFdefparamList must be added on the switched master of the instance cell. Unfortunately I ignore what doest switched master mean. The post dates 2007, so it's improbable, that I will be answered.

    Regards.

    Pavel.

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