I want to test a mixed signal design in cadence virtuoso 6.1.5 with spectre.
To verify the functionallity of the digital part a very long input sequence, thousands of bits, is necessary.
I tried using the vbit source. What is very usefull about this is that it is possible to adjust the voltage levels as well as the length of one bit. This makes it superior over the vpwl at least for my application.
I found a helpful document that makes it possible to adjust the properties of vbit in a way that it is possible to insert a design variable for the data . Another document helped me to load a bitstream from a tex-file into this design variable inside ade-l.
The problem is that this is only possible for short bitstreams. At least my bitstream is too long for such a proceeding.
Is there any other approach to solve this problem?
A stimulus file would also be very long/large...
Thanks a lot.
Just one mre thing:-
I am also using vsource-pwl for generating the clock waveform.
What exactly I am doing is that:-
I have captured the transient clk waveform of another circuit and stored it in a text file ( time amplitude) format. This clk is for one frequency.
I load the file in the vsource-pwl.
Similarly I have multiple .txt files for various frequrncies.
With the way anlogous to the way you have mentioned, can I change the file name in the loop by parameterizing it.
In other words I can run the sumulation for multiple frequency in a for loop.