Please can you elaborate how to use the vcvs source as OR or AND gate? How to connect the terminals?
Yes, it's a bit of an oddity - but one that comes from the same feature in certain other SPICE simulators - they also behave the same way where AND and NAND are equivalent (I just checked). This isn't entirely surprising if you think about it, because there's no information on what the inversion would be...
To get the inversion, you have to set the "Type of transfer char" to PWL, and then you can specify a PWL mapping of input to output voltage (so for example, in my case if I have 4 inputs in the PWL vector, with inputs 0, 0.2, 1.8, 2 and outputs 2, 1.8, 0.2, 0 - this will achieve the inversion (I had a 2 volt "supply" in my case).