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Pin mismatch between schematic and symbol in Virtuoso

Hi,

I have a symbol view which has bus notation for pins like A<1:10>, B<1:10> (imported from verilog).

But the corresponding schematic has single bit notation, like A<0>, A<1> etc...(imported from a spice netlist)

I want to modify the schematic, by creating the bus style notation and remove the single pins.

Is there an automatic way to accomplish this? If not, is there a predefined Cadence skill function which may help?

Thanks,

Andrew Beckett over 12 years ago

Don't think there's a built-in way - you'd have to write SKILL to do this, I guess. Or do Create CellView->From CellView from symbol to a dummy schematic view, and then copy the pins across.
Andrew.
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