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Pnoise analysis

Jithin

Hi,

I have been doing a pnoise analysis for a PLL . Looking into the Pnoise simulation profile I have found a tab

regarding thevalue for " Reference sideband" .What is the value that I should put while my "Maximum number of sidebands =7".

With Regards,

Jithin K 

  • Andrew Beckett

    Jithin,

    The reference sideband is needed to compute either input referred noise or noise figure. If you only require the output noise, you can set the input source on the form to "none", and then you won't have to fill this in.

    If you do want either of these quantities, then this is to allow you to define the relationship between the desired signal path from the input to the output so that you can get the right gain used to divide the output noise, or compute the amount of noise caused by the input port at the output.

    The number specified is to define the frequency translation, so for a given output frequency Fout, the input frequency would be |k*PSSfund+Fout| - or you can use the select from list to pick the right frequency.  

    So for example you are simulating a switch cap filter where the input and output frequencies are the same, it would be 0. For a down converting mixer it might be -1 and so on.

    Regards,

    Andrew 

  • Jithin
    Thank you for your kind reply. After doing simulation I will come up with results. With regards, Jithin
  • Jithin
    Hi,

    I have been done the Pnoise analysis setting noise type as "sorces". Unfortunately I was unable to plot the phase noise response.
    My design was  "Pnoise analysis" and the setup was described below.
    My apparatus was a PLL with a fixed divider ratio of 20 and output frequency of 500Mz
    In PSS analysis I have set the beat frequency as reference frequency ie 20 MHz. In Pnoise tab I have put output node as VCO output ie 500MHz node and Input source kept as none.
    Even though the PSS analysis had been converged and done the Pnoise analysis, I haven't got any Phase noise Plot.
    Please guide me to overcome this problem.


    Thanking you .

    With regards,
    Jithin
  • Andrew Beckett

     To avoid this question being answered twice, it has been logged again as /forums/p/25899/1322529.aspx#1322529

  • Jithin
    I am sorry for asking the same question again .The thing is that I am stuck with this problem . If in Pnoise analysis setup, I consider the Output node as "Divider out" then I am getting all the required that is Phase noise plot. But if I'm considering the output node as PLL output node (ie VCO output node ) then I am not getting the result that is phase noise plot. With Regards, jithin
  • Andrew Beckett

    I'm busy doing my day job, and will take a look at this later today if I have time (or rather your other post).

    Andrew.

  • Mehdi Nasr
    Dear Andrew,

    I have designed a 66GHz PLL and imported the inductor s-parameters into cadence. The transient response and PSS simulation work fine but the pnoise analysis is running without any error but I do not have the results when I check the main form. How can I debug it when I do not have the error? Really appreciate your time.

    Regards,
    Mehdi
  • Andrew Beckett

    Mehdi,

    I’m not sure I know what you mean. What does the log file look like? What do you see in the results browser?

    This is probably one of those things that going to makes more sense so we can see what you’re doing.

    Also, you appear not to have read the forum guidelines, because this post is on the end of an old thread (the forum guidelines ask you not to do this) and even worse it doesn't even seem to be related to your question.

    Regards,

    Andrew.

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