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Noise sources in PSS analysis

OneNewBoy
OneNewBoy over 12 years ago

Hi all,

I have a pretty simple doubt. I am using Verilog A based circuit netlist to perform circuit simulation in cadence spectre.

I have defined some flicker noise sources in the same netlist. If I simulated a simple differential amplifier, I can get the inut referred noise through noise analysis.

Now suppose I wish to simulated a clocked comparator, will I need to change the flicker noise models before I do the noise analysis to get the input referred noise for this circuit ? In fact a direct noise analysis just gives noise contriution in the output current, while the input misses them completely. This is probably due to: gain is not exactly defined for clocked circuits in simple noise analysis [as gain is defined based on unique bias points, so it will be defined  in case of a static biasing circuit like a differential amplifier unlike the case of clocked comparator]. 

Probably I will need to do PSS for that or are there any other approaches to derive input referred noise of such clocked circuits ?

Any pointers will be great. Thanks a lot ! 

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  • Medoly
    Medoly over 8 years ago
    Hi ,I am not sure when you can see this message .I am a new beginner in IC desigen, Can i ask an question about VerilogA ?In the Veilog-A manual ,I see this code ,but i cann't understand what is
    kf, ef,af. In this manual ,it also doesn't give any comment. Could you give me answer? I am really sorry to bother you . ,and looking forword to your reply. thanks .

    module diode (a, c) ;
    inout a, c ;
    electrical a, c ;
    parameter real rs=0, is=1e-14, tf=0, cjo=0, phi=0.7 ;
    parameter real kf=0, af=1, ef=1 ;
    analog begin
    I(a, c) <+ is*(limexp((V(a, c)-rs*I(a, a))/$vt) - 1);
    I(a, c) <+ white_noise(2* `P_Q * I(a, c)) ;
    I(a, c) <+ flicker_noise(kf*pow(abs(I(a, c)),af),ef);
    end
    endmodule
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  • Medoly
    Medoly over 8 years ago
    Hi ,I am not sure when you can see this message .I am a new beginner in IC desigen, Can i ask an question about VerilogA ?In the Veilog-A manual ,I see this code ,but i cann't understand what is
    kf, ef,af. In this manual ,it also doesn't give any comment. Could you give me answer? I am really sorry to bother you . ,and looking forword to your reply. thanks .

    module diode (a, c) ;
    inout a, c ;
    electrical a, c ;
    parameter real rs=0, is=1e-14, tf=0, cjo=0, phi=0.7 ;
    parameter real kf=0, af=1, ef=1 ;
    analog begin
    I(a, c) <+ is*(limexp((V(a, c)-rs*I(a, a))/$vt) - 1);
    I(a, c) <+ white_noise(2* `P_Q * I(a, c)) ;
    I(a, c) <+ flicker_noise(kf*pow(abs(I(a, c)),af),ef);
    end
    endmodule
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