I am little bit new to the domain of verilog-ams. I have created blocks using verilog-a and have successfully simulated them along with other components like voltage sources, resistor etc.
Now I am trying to create a block in verilog-ams that would convert logic to electrical signal and I would like to use this block as a connect module to convert from logic to electrical.
The code of the logic2electrical block is like this:
//Verilog-AMS HDL for "Work_Indra", "logic2electrical123" "verilogams"
`timescale 1ns / 10ps
module logic2electrical123 (in,out );
parameter real v0 = 0 ;
parameter real v1 = 1.8 ;
parameter real vx = 0.9 ;
parameter real vz = 1.8 ;
parameter real tr = 1e-09 ;
parameter real tf = 1e-09 ;
assign in = in;
1'b0: begin v = v0; end
1'b1: begin v = v1; end
1'bx: begin v = vx; end
1'bz: begin v = vz; end
always @in begin
V(out) <+ transition(v, 0, tr, tf);
The code has been compiled successfully and I am able to generate a symbol.
Now in schematic editor I am trying to use that symbol. In the input side I have just connected a source "vbit" with logic '1' and the o/p I have connected to ground via a resistor.
While I try to do any kind of analysis, I am getting some error like as shown in the pic attached.
Thank you very much. I got the point. After reading your response, I started learning about AMS Designer and tried to set up AMS environment. Had a few problems initially, but finally I was able to set up AMS design environment on ADE and run my design (consisting of both verilog and verilogams blocks) successfully.
Couldnot use the vbit source though, had to write some code in verilog for the bit source. But would like to know more on vbit source and its use. Because, I need to get a bit pattern as input, maybe vbit can be helpful if I can get it to use.