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  3. Automatic Routing for Analog Layout XL

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Automatic Routing for Analog Layout XL

ke11y5
ke11y5 over 11 years ago

I am using the automatic routing tool under 'Route' in Layout XL (IC6.1.6) and cannot figure out how to implement the spacing rules.  I'm laying out a simple OpAmp with a current mirror and implementing the common centroid technique for a few of my mosfets. When running the routing tool everything routes correctly except the contacts. The contacts, CA, are placed on top of the active layer, RX, of my nmos and pmos's, which violates the spacing rules. I've tried creating rules in the Constraint Managaer -> Process Rule Manager for the spacing; however, the rules aren't followed when I select them in the Automatic Routing tool. Some help would be great. Thanks.

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  • Andrew Beckett
    Andrew Beckett over 11 years ago

    Please contact customer support (if you've not done so already). It's going to be hard to figure out what is wrong without seeing your data.

    Kind Regards,

    Andrew.

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  • PNadeau
    PNadeau over 10 years ago

    Old thread, but I had a similar issue when I tried adding my own rules to the Process Rule Manager (they were not being followed by the auto-router).

    I was able to solve it by using the following steps:

    1. In Layout XL, open the Constraint Manager.
    2. Launch the Process Rule editor and define the extra custom process rules under the "Design" radio button. Also include a reference to "virtuosoDefaultSetup" rules.
    3. Back to Layout XL ensure that "Design Rule Process Override" appears as constraint underneath your block.  Sometimes I see only a "Default" constraint, but I delete this and add Process Rule Override. You can add using the drop down . It's the second bottom from the left.  Click the down arrow and mouse over "Routing."
    4. Save the constraints (save button in the Constraint Manager window)
    5. Go to the auto router (Route -> Automatic Routing)
    6. Select your custom process rules as the Default Constraint Group, choose your other options, and click "run"

    The key step for me seemed to be making sure I applied the constraint as "Design Process Rule Override"

    Hope that helps.

    Cheers,

    Phil

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