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Problems to run PSP and BSIM3 compact models in verilog-A

ronaldomponte

 =============================================================================

Cadence (R) Virtuoso (R) Spectre (R) Circuit Simulator

Version 12.1.0.272 32bit -- 25 Sep 2012

virtuoso -W: sub-version  IC6.1.5.500.7 

spectre -W:  

/usr/EDATools/cadence/mmsim121/tools.lnx86/spectre/bin/32bit/spectre: /usr/EDATools/cadence/mmsim121/tools.lnx86/lib/SuSE/libelf.so.1: no version information available (required by /usr/EDATools/cadence/mmsim121/tools/lib/libvirtuos_sh.so)

sub-version  12.1.0.272 

 =============================================================================

Hello,

 I'm quite new working with cadence tools, so my apologies in advance if some misunderstood.

My attempt to run a behavioral MOSFET model using PSP and BSIM3 verilog-a codes (available in their respective websites) is facing some errors:

1) When trying to run the PSP model, I do compile the verilog-a code successfully, but when I run virtuoso the following error occurs:

Error found by spectre during AHDL read-in.

    ERROR (VACOMP-2065): "/home/ronaldomponte/Desktop/ISFET_MODEL_VERILOG-AMS/isfet/psp/veriloga/PSP103_module.include", near line 2940: Encountered ddx operator in a conditional (if-else) statement. ddx operator cannot appear in a conditional (if-else) statement. Correct the problem and try again.

    ERROR (VACOMP-1816): Exiting AHDL compilation.

    ERROR (SFE-91): Error when elaborating the instance PSP103VA. Simulation should be terminated. 

 

 It seams to me that the compiler does not support the "ddx" operator in conditional statements and I don't know how to solve this.

 

 2) The BSIM3 verilog-A code fails to compile due to the following errors:

 Error found by spectre during AHDL compile.

    ERROR (VACOMP-1788):

        "/home/ronaldomponte/Desktop/ISFET_MODEL_VERILOG-AMS/isfet/bsim3/veriloga/compact.vams",

        line 62: Encountered an unrecognized compiler directive. Check the

        validity of the compiler directive.

    ERROR (VACOMP-2212): "BSIM3npeak<<--? );

"

        "/home/ronaldomponte/Desktop/ISFET_MODEL_VERILOG-AMS/isfet/bsim3/veriloga/veriloga.va",

        line 1809: Encountered undeclared identifier: . Declare the identifier

        before using it.

    ERROR (VACOMP-2259):

        "/home/ronaldomponte/Desktop/ISFET_MODEL_VERILOG-AMS/isfet/bsim3/veriloga/veriloga.va",

        line 1809: syntax error.

 

The first error happens in the following statement:

--------------------------------------------------------------------------------------- 

/* Print out value:

   example: `DEBUG_STROBE("myVariable", myVariable); */

`define DEBUG_STROBE(xName, x) \

`ifdef DEBUG \

    $strobe("\n%s = %g", xName, 1.0*x) \

`else \

    ; \

`endif

 

--------------------------------------------------------------------------------------- 

 
While the second one with this:

--------------------------------------------------------------------------------------- 

 if (!BSIM3npeakGiven && BSIM3gamma1Given) begin

 

            T0 = BSIM3gamma1 * BSIM3cox;

            BSIM3npeak = 3.021E22 * T0 * T0;

            $strobe("\nWARNING: npeak not given, gamma1 given: npeak=%g", \

                     BSIM3npeak);

        end  

--------------------------------------------------------------------------------------- 

Again, it seems the compiler does not support some directives and/or operators.

I am using the MMSIM12.1 that might be the latest version available.

I really appreciate if anyone could give me an insight about what is the problem. 

The PSP code is available in pspmodel.asu.edu/.../psp103.1.1.tar.gz, while the BSIM3 is attached.

 

 

 

bsim3.zip

  • The PSP model compiles OK under later versions of MMSIM12.1 - I tried in MMSIM12.1 ISR6 ( 12.1.0.418.isr6 ) and MMSIM12.1 ISR14 ( 12.1.1.134.isr14 ). I see the failure in the base version of MMSIM12.1 that you're using though. There's also a comment in the code (in psp103.va):

     // Note: some verilog-A compilers have problems handling the ddx-operator,
    // which occurs in definition of OP-output variables. If the line below is
    // commented out, all OP-output variables using the ddx-operator are skipped.
    `define OPderiv

    If I comment that out and compile in 12.1.0.272, it also compiles OK.

    For the bsim3 model, make the following changes:

    1. In compact.vams comment out the definition of DEBUG_STROBE (it's not used anywhere anyway). Add /* before line 57, and */ after the first 'endif that is 5 lines later - leave the final 'endif. It seems that spectre's parser is thrown by the nested macro definition - but since it's not used, commenting it out won't cause any problems.
    2. In veriloga.va go to line 1808 and remove the "\" at the end of the line (this is the $strobe line that proceeds the  BSIM3npeak). It's not really necessary and I think is confusing the parser.

    That seems to fix both issues.

    That said, why are you using these models? They are both built-in to spectre, and will be faster if you use the built-in compact models.

    Kind Regards,

    Andrew.

  • Wow Andrew,

     Very very helpful solution! It fixed both cases. Thank you very much.

    As a stated before, I'm a new user in cadence tools. So, that was the way I found to test the models and probably is not the best one.

    Could you explain or give me directions on how can I use/select the built-in models in spectre? Or maybe I need to add a new thread with this issue?

    Thank you very much for helpful and speedy solution.

    I really appreciate your efficiency.

    Kind regards.

    Ronaldo 

  • Hi Ronaldo,

    If you type (from the UNIX command line):

    spectre -h bsim3v3

    spectre -h psp103

    you'll see some built-in help on these models. You can use them by creating a model file, mymodels.scs :

    model nch bsim3v3 type=n
    model pch bsim3v3 type=p

    etc (you probably want other model parameters in practice - this is a minimal model with default values for everything other than the "gender" of the device). See the model parameters listed in spectre -h for more details.

    Then your transistors can reference nch and pch as their model - in a spectre netlist, you'd have:

    M1 (d g s s) nch w=1u l=0.5u

    for example.

    Regards,

    Andrew.

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