• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
  3. Report the netlist types used in ADE XL netlists?

Stats

  • Locked Locked
  • Replies 9
  • Subscribers 125
  • Views 15256
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Report the netlist types used in ADE XL netlists?

sram8t
sram8t over 11 years ago

I'm interested in getting a report of the netlist types (schematic extracted ...) for each subckt from an ADE XL job or even prior to running the job. How would I do that?   

  • Cancel
  • sram8t
    sram8t over 11 years ago

    Additional question: Is it possible to select the netlist view (e.g. schematic or extracted) on a cell by cell base? (in the case both views exist for same cells) 

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Andrew Beckett
    Andrew Beckett over 11 years ago

    I've just written some SKILL code to produce a nice HTML report showing info about the views used (and the hierarchy) in each of the tests in an ADE XL view. It's based on some code I already had, but updated to extract info from the ADE XL view.

    Take the gzipped tar file and then unpack it (tar xvfz designReport.tar.gz) and then load all the files (keep the suffixes as they are).

    Then with the ADE XL view open, run in the CIW:

    abDesignReportFromADEXL()

    This will create an HTML file in the documents folder of the ADE XL view. Click on this and it will show the report in your web browser.

    I'll show a typical report output below (it's not pasted it perfectly).

    But before I do that, let me answer your second question. The simple answer is that you should create a config using the hierarchy editor (see the documentation on the hierarchy editor). This will allow you to pick different views to use for each cell, or each instance, or each hierarchical occurrence. You then use the config as the view you are using in the test. If you've not used it before, I suggest you do - it's a very powerful way of controlling what you are simulating.

    Kind Regards,

    Andrew.

     

    Report for Active Setup


    Test: AC

    Design Hierarchy

    Library opamp090
    Cell full_diff_opamp_AC
    View config
    Top Library opamp090
    Top Cell full_diff_opamp_AC
    Top View schematic
    analogLib idc symbol I1 [spectre]
    opamp090 acOpenDiff symbol I21 [veriloga]
    analogLib vcvs symbol (5) [spectre]
    analogLib res symbol (6) [spectre]
    analogLib cap symbol cl [spectre]
    analogLib vdc symbol (3) [spectre]
    opamp090 full_diff_opamp symbol I0 [schematic]
    gpdk090 pmos1v symbol (16) [spectre]
    opamp090 ampp symbol I4 [schematic]
    gpdk090 nmos1v symbol (4) [spectre]
    gpdk090 pmos1v symbol (4) [spectre]
    opamp090 ampp symbol I3 [schematic]
    gpdk090 nmos1v symbol (4) [spectre]
    gpdk090 pmos1v symbol (4) [spectre]
    opamp090 ampn symbol I2 [schematic]
    gpdk090 nmos1v symbol (4) [spectre]
    gpdk090 pmos1v symbol (4) [spectre]
    opamp090 ampn symbol I1 [schematic]
    gpdk090 nmos1v symbol (4) [spectre]
    gpdk090 pmos1v symbol (4) [spectre]
    gpdk090 mimcap symbol (4) [spectre]
    gpdk090 ressppoly symbol R1B [schematic]
    gpdk090 primRes3 symbol R0 [spectre]
    gpdk090 ressppoly symbol R1A [schematic]
    gpdk090 primRes3 symbol R0 [spectre]
    gpdk090 nmos1v symbol (21) [spectre]

    Cellview Summary

    Library Cell View Last Changed
    gpdk090 ressppoly schematic Aug 20 02:13:08 2007
    opamp090 acOpenDiff veriloga Dec 5 18:10:28 2012
    opamp090 ampn schematic Dec 24 11:24:44 2008
    opamp090 ampp schematic Apr 30 13:25:55 2013
    opamp090 full_diff_opamp schematic Nov 19 21:42:01 2012
    opamp090 full_diff_opamp_AC schematic Nov 19 21:39:56 2012

    Configuration File

    //Revision 83
    //NOTE
    // Default template for spectre
    // Note:
    //      Please remember to replace Top Cell Library, Cell, and View
    //      fields with the actual names used by your design.
    //END_NOTE
    
    config full_diff_opamp_AC;
    design opamp090.full_diff_opamp_AC:schematic;
    liblist myLib;
    
    viewlist spectre, cmos_sch, \cmos.sch , schematic, veriloga, ahdl;
    stoplist spectre, spectreStop;
    
    
    inst (opamp018.full_diff_opamp_AC:schematic).I0 binding :schematic;
    cell opamp018.full_diff_opamp binding :schematic;
    
    cell opamp090.ampp binding :schematic;
    
    
    endconfig
    

    Design Variable Usage

    Variable Lib Cell View Instance
    gain opamp090 full_diff_opamp_AC schematic R12
    R13
    vcm opamp090 full_diff_opamp_AC schematic vcm
    vdd opamp090 full_diff_opamp_AC schematic V0

    Test: TRAN

    Design Hierarchy

    Library opamp090
    Cell full_diff_opamp_TRAN
    View config
    Top Library opamp090
    Top Cell full_diff_opamp_TRAN
    Top View schematic
    analogLib idc symbol I1 [spectre]
    opamp090 full_diff_opamp symbol I0 [schematic]
    gpdk090 pmos1v symbol (16) [spectre]
    opamp090 ampp symbol I4 [schematic]
    gpdk090 nmos1v symbol (4) [spectre]
    gpdk090 pmos1v symbol (4) [spectre]
    opamp090 ampp symbol I3 [schematic]
    gpdk090 nmos1v symbol (4) [spectre]
    gpdk090 pmos1v symbol (4) [spectre]
    opamp090 ampn symbol I2 [schematic]
    gpdk090 nmos1v symbol (4) [spectre]
    gpdk090 pmos1v symbol (4) [spectre]
    opamp090 ampn symbol I1 [schematic]
    gpdk090 nmos1v symbol (4) [spectre]
    gpdk090 pmos1v symbol (4) [spectre]
    gpdk090 mimcap symbol (4) [spectre]
    gpdk090 ressppoly symbol R1B [schematic]
    gpdk090 primRes3 symbol R0 [spectre]
    gpdk090 ressppoly symbol R1A [schematic]
    gpdk090 primRes3 symbol R0 [spectre]
    gpdk090 nmos1v symbol (21) [spectre]
    analogLib vpwl symbol (2) [spectre]
    analogLib vcvs symbol E0 [spectre]
    analogLib res symbol R2 [spectre]
    analogLib cap symbol cl [spectre]
    analogLib vdc symbol (3) [spectre]
    opamp090 summer symbol I10 [schematic]
    analogLib presistor symbol (2) [spectre]
    analogLib vcvs symbol (3) [spectre]
    opamp090 summer symbol I9 [schematic]
    analogLib presistor symbol (2) [spectre]
    analogLib vcvs symbol (3) [spectre]

    Cellview Summary

    Library Cell View Last Changed
    gpdk090 ressppoly schematic Aug 20 02:13:08 2007
    opamp090 ampn schematic Dec 24 11:24:44 2008
    opamp090 ampp schematic Apr 30 13:25:55 2013
    opamp090 full_diff_opamp schematic Nov 19 21:42:01 2012
    opamp090 full_diff_opamp_TRAN schematic Apr 30 13:25:36 2013
    opamp090 summer schematic Jan 4 17:14:22 2007

    Configuration File

    //Revision 46
    //NOTE
    // Default template for spectre
    // Note:
    //      Please remember to replace Top Cell Library, Cell, and View
    //      fields with the actual names used by your design.
    //END_NOTE
    
    config full_diff_opamp_TRAN;
    design opamp090.full_diff_opamp_TRAN:schematic;
    liblist myLib;
    
    viewlist spectre, cmos_sch, \cmos.sch , schematic, veriloga, ahdl;
    stoplist spectre;
    
    
    inst (opamp018.full_diff_opamp_TRAN:schematic).I0 binding :schematic;
    cell opamp018.full_diff_opamp binding :schematic;
    
    
    endconfig
    

    Design Variable Usage

    Variable Lib Cell View Instance
    vcm opamp090 full_diff_opamp_TRAN schematic vcm
    vdd opamp090 full_diff_opamp_TRAN schematic vdd

     

    designReport.tar.gz
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Andrew Beckett
    Andrew Beckett over 11 years ago

    The formatting of the report definitely got mixed up a bit - so give it a try yourself to see what it really looks like.

    Kind Regards,

    Andrew.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • sram8t
    sram8t over 11 years ago

     Andrew, thanks for the code and the pointer to cdsHierEditor.

    When generating the html I only see one level of hiererchy. Not sure if this has to do with sublevels of hierarchy being in other libraries. Yet, cdsHierEditor finds the hierarchy. In cdsHierEditor it displays that the extracted cellView is not found (view found **NONE**). Not sure how this is handled in the netlisted. In the netlist I have includes at theend introduced by a comment

    // Include extracted spice netlists
     

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Andrew Beckett
    Andrew Beckett over 11 years ago

    The code does have a hardcoded switch view list - so if you're not using a config, it probably won't even attempt to switch into anything other than schematic and symbol views - this would need fixing on lines 452 and 639 of abDesignReport.ils by passing ?viewList "spectre schematic veriloga symbol" or similar to the call to abSchTree.

    If using a config, it should expand the hierarchy using whatever views have been picked in HED.

    I'm not sure why the extracted cellView is not working in the hierarchy editor - it suggests that the view being searched for doesn't exist as a view. Have you entered the view name correctly?

    That said, I suspect you must be using some non-Cadence extraction tool, because if it was QRC the netlist would be generated from the extracted view. Did you enter the global view list properly in the hierarchy editor? It would typically list all the views you want to include. Or you might have to go over the cell or instance in the hierarchy editor (HED) and do Right Mouse->View to Use and pick the name of your extracted view.

    Kind Regards,

    Andrew.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • sram8t
    sram8t over 11 years ago

    Editing the abSchTree calls helped getting the hierarchy.

    Yes, the extraction was done with a non-Cadence tool. The extraction cellviews (hspiceerie) are non standard cellViews. So that might be the problem here. I'll have to check with the library onwer about that.   

    Thanks so far

     

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • sram8t
    sram8t over 11 years ago

     I got more clarification as the extracted cellView is linked to the spectre view. So I just need to switch between schematic and spectre.

    Yet, even if the config view (expand.cfg) of the topcell being netlisted contains binding : schematic for a subcell the netlisting is done with spectre. Is the config view not being reread when netlisting after changing the config?

     

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Andrew Beckett
    Andrew Beckett over 11 years ago

    Did you save the config view? You'd need to do that...

    Apart from that, I've not seen any cases where changes to the config view are not honoured by the netlister.

    Regards,

    Andrew.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • sram8t
    sram8t over 11 years ago

    Found the problem now. I was netlisting the schematic. If I netlist the config, the config's settings are honored.

     

     

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information