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VerilogA: report DC voltage

Frank Opteynde

I would like to make a component with a VerilogA model, doing the following:

The component has one voltage input pin (let's call it 'A').

During a DC sweep analysis, an output file is opened at the start of the analysis.  At each anlysis point, the DC voltage on node 'A' is reported in the file.  Then, after the DC sweep analysis is completed, the file is closed.

 How can I do this? 

  • Andrew Beckett

    `include "disciplines.vams"

    module reportDC(in);
    input in;
    electrical in;

    integer fp;

    analog begin
        @(initial_step)
            fp=$fopen("./%A_%M.txt");
        $fwrite(fp,"%g\n",V(in));
        @(final_step)
            $fclose(fp);
    end

    endmodule

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