inquiry about the results of the serial capacitors in cadence

You would type "spectre -h options" (not capacitor) from the UNIX command line. Or search in "cdnshelp" for "rforce".

Anyway, the key to understanding this is to know that an "ic" on a capacitor adds a resistor (with value rforce) and current source (with value ic/rforce) in parallel with the capacitor for the duration of the dc operating point analysis. The capacitor itself will be removed (set to 0) for the dc analysis (because it's dc, the capacitor can't have an effect anyway). So in the original top circuit, you have two "rforce" resistors in series across the source, giving you a potential divider with 5V at the midpoint. Since ic=0, there's no current flow - so the capacitors end up charged with 5V across each, and since nothing changes during the transient they stay where they are (the resistors are removed during the transient itself).

In the second circuit, you start off with a potential dividier with four series 1 ohm resistors - so c1t=7.5V, c1b=5V, c2t=2.5V. Then when the transient itself starts (after the initial DC), the two resistors in parallel with the capacitors are removed, so you end up with the charges redistributing based on the fact that the left capacitor had 5V across it, and the right capacitor had 2.5V across it.

In your final two circuits, it's the same type of thing happening - you've got current sources in parallel with 1 ohm resistors, and with a bit of consideration you can see how it came up with the initial voltages. These settle out during the transient (in the top of the two circuits, with the resistor in the circuit). The overall decay you are seeing is due to a "gmin" resistor (1e12 ohms) added by default which is there to provide a current path for floating nodes (which otherwise could degrade performance). If you set gmin=0 as an option (in ADE gmin and rforce are on Simulation->Options->Analog), you won't see this leakage path. In general though, setting gmin=0 would tend to provide worse convergence (and anyway real circuits have a leakage path).

Some of your issues are caused by the fact that you are creating contradictory initial conditions. In your original circuit, it's plainly impossible for both capacitors to have an initial condition of 0V with a 10V constant source across them. If you started off with 0V and then stepped it to 10V then that would be reasonable. In your bottom most circuit, you can't have two capacitors in parallel one with 5V and one with 2V across it. This is precisely why there's an "rforce" inserted - it prevents an impossible situation but tends to encourage the right voltage provided that the other impedances are high enough relative to the rforce.

Regards,

Andrew.

You would type "spectre -h options" (not capacitor) from the UNIX command line. Or search in "cdnshelp" for "rforce".

Anyway, the key to understanding this is to know that an "ic" on a capacitor adds a resistor (with value rforce) and current source (with value ic/rforce) in parallel with the capacitor for the duration of the dc operating point analysis. The capacitor itself will be removed (set to 0) for the dc analysis (because it's dc, the capacitor can't have an effect anyway). So in the original top circuit, you have two "rforce" resistors in series across the source, giving you a potential divider with 5V at the midpoint. Since ic=0, there's no current flow - so the capacitors end up charged with 5V across each, and since nothing changes during the transient they stay where they are (the resistors are removed during the transient itself).

In the second circuit, you start off with a potential dividier with four series 1 ohm resistors - so c1t=7.5V, c1b=5V, c2t=2.5V. Then when the transient itself starts (after the initial DC), the two resistors in parallel with the capacitors are removed, so you end up with the charges redistributing based on the fact that the left capacitor had 5V across it, and the right capacitor had 2.5V across it.

In your final two circuits, it's the same type of thing happening - you've got current sources in parallel with 1 ohm resistors, and with a bit of consideration you can see how it came up with the initial voltages. These settle out during the transient (in the top of the two circuits, with the resistor in the circuit). The overall decay you are seeing is due to a "gmin" resistor (1e12 ohms) added by default which is there to provide a current path for floating nodes (which otherwise could degrade performance). If you set gmin=0 as an option (in ADE gmin and rforce are on Simulation->Options->Analog), you won't see this leakage path. In general though, setting gmin=0 would tend to provide worse convergence (and anyway real circuits have a leakage path).

Some of your issues are caused by the fact that you are creating contradictory initial conditions. In your original circuit, it's plainly impossible for both capacitors to have an initial condition of 0V with a 10V constant source across them. If you started off with 0V and then stepped it to 10V then that would be reasonable. In your bottom most circuit, you can't have two capacitors in parallel one with 5V and one with 2V across it. This is precisely why there's an "rforce" inserted - it prevents an impossible situation but tends to encourage the right voltage provided that the other impedances are high enough relative to the rforce.

Regards,

Andrew.