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  3. I have a design consisting of 32 bit input pin sitimulis...

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I have a design consisting of 32 bit input pin sitimulis problem

ahmed osama
ahmed osama over 11 years ago

 I am using spectre as simulation tool , my design have 32 bit input pins how i can assign this bits with values

I use vector file but it works fine with single bit , when i increase radix more than 1 it fails

I use sitimulis file but it also fails 

what is the most effective way to test 32 bit input pins in spectre 

Thanks

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  • Andrew Beckett
    Andrew Beckett over 11 years ago

    In my case if I used your vector file, I got:

     Notice from spectre during topology check.
        Only one connection to the following 4 nodes:
            A[1]
            A[0]
            B[1]
            B[0]

    That's because it generates signals A[1], A[0], B[1], B[0] - and these weren't connected in my circuit. If you want A<1> etc, you'd use:

    vname A<[1:0]> B<[1:0]>

    If you want them called A1, A0, etc, you'd use:

    vname A[1:0] B[1:0]

    You're getting messages about other nodes - so it suggests that you've not got the names right in the vname statement.

    Regards,

    Andrew.

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  • Andrew Beckett
    Andrew Beckett over 11 years ago

    In my case if I used your vector file, I got:

     Notice from spectre during topology check.
        Only one connection to the following 4 nodes:
            A[1]
            A[0]
            B[1]
            B[0]

    That's because it generates signals A[1], A[0], B[1], B[0] - and these weren't connected in my circuit. If you want A<1> etc, you'd use:

    vname A<[1:0]> B<[1:0]>

    If you want them called A1, A0, etc, you'd use:

    vname A[1:0] B[1:0]

    You're getting messages about other nodes - so it suggests that you've not got the names right in the vname statement.

    Regards,

    Andrew.

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