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  3. Pin definition in layout.oa (layer, connectivity) ?

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Pin definition in layout.oa (layer, connectivity) ?

samung
samung over 11 years ago

Hello,

I would like to know what is the standard for the pin definition (vdd/vss/input_pin/output_pin) in a layout.oa view (Cadence) ?

 

I mean, I have to generate a FRAM or LEF view from a layout.oa cell and I am not sure of my pin definition in the layout.oa

 

Indeed, it can be something like (for vdd) :

layer pin_M1 (text : vdd), no connectivity

+ layer M1_drawing (connectivity : net name => vdd))  

 

or

 

layer text drawing vdd 

+ layer pin_M1 (text : vdd), no connectivity

+ layer M1_drawing (connectivity : net name => vdd)) 

 

Thanks !!

 

P. 

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  • ColinSutlieff
    ColinSutlieff over 11 years ago

     Hi Samung,

    there is no real standard for layout views although if the layouts were created by Cadence tools it is very common to create rectangle pins and put them on a metal layer with a "pin" purpose (The pin purpose makes it easier to see pins because they typically have a different color/stipple pattern.

    The Abstract generator  has lots of different options because pin information is represented in lots of different ways in the original layouts.

    If the layouts come from an external source (GDS2 perhaps?) a common way of representing pin info is to use text labels. The abstract generator can then transfer the text information to any underlying geometries and create pins.

    You really need to know how the pin information is represented in the layouts, otherwise you won't know which settings to set in the abstract generator.

    So, in summary, there is no DIN/ISO standard for what the layouts should look like. Although it would be a good idea.

    Colin

     

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  • samung
    samung over 11 years ago

    Thanks Colin, for the reply. 

    My input file is a layout.oa, so I have already the terminals defined (by terminal I mean pins (vdd/vss/input &output pins)).

    My strategy for the pin definition in this layout.oa :  

    one layer on M1 drawing with connectivity vdd

    + layer pin M1 on this layer (Terminal Name : vdd)

    + layer text drawing "vdd" (no connectivity)

     

    With this definition, I have already the terminal/pins defined for the Abstract Generation.

     

    However, I have some high difficulty in using this layout.oa -> .gds file with synopsys milkyway tool and especially the get_ports/get_pins command which don't recognize the pins. So, that's why i need to get a LEF view, then this view will be at the input of the  synopsys milkyway tool FRAM generation.

     

    P. 

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