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Extracting generic devices with Assura

PietroUser

I would like to extract my own two terminals device from the layout.

The first terminal is derived with specific derivation rules, the second terminal instead should be named according to the layout x,y coordinates of the first terminal.

Example:

 XavD2_1 avC1 prefix_x_y DEV

avC1_x_y is a given prefix followed by the first terminal layout coordinates

Is this possible?

Thanks,

Pietro

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  • PietroUser

    Hi Andrew,


    I want extract from the layout specific devices. For this purpose I created a specific layer that is used to select some transistors in the layout from which I want extract such device. Device extraction rules are in my extract.rul file.

    A classic example is the extraction of the parasitic diode formed by the n-type drain and the p-type substrate from a NMOS transistor. The NMOS n-type drain is the diode cathode while the substrate is the anode. In my case, the extracted diode should have as cathode the NMOS drain while as anode a pin corresponding to the coordinates of the center of the layer used to select the extraction area. 


    The purpose is to simulate the extracted netlist applying some stimulus signals directly on the extracted pin. When more devices are extracted I can simulate some specific couplings and the coordinate of the pins as name are useful to find any couplings between different transistors into the layout. 


    In other words I would like to force the name of one pin of an extracted device.

Reply
  • PietroUser

    Hi Andrew,


    I want extract from the layout specific devices. For this purpose I created a specific layer that is used to select some transistors in the layout from which I want extract such device. Device extraction rules are in my extract.rul file.

    A classic example is the extraction of the parasitic diode formed by the n-type drain and the p-type substrate from a NMOS transistor. The NMOS n-type drain is the diode cathode while the substrate is the anode. In my case, the extracted diode should have as cathode the NMOS drain while as anode a pin corresponding to the coordinates of the center of the layer used to select the extraction area. 


    The purpose is to simulate the extracted netlist applying some stimulus signals directly on the extracted pin. When more devices are extracted I can simulate some specific couplings and the coordinate of the pins as name are useful to find any couplings between different transistors into the layout. 


    In other words I would like to force the name of one pin of an extracted device.

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