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How to define a binary matrix parameter in Verilog A

microstudent

Hi guys, I have a question about how to define a binary matrix parameter in Verilog A. For example, I can define parameter as data_pattern[15:0]={0,0,0,.....,0}. To my knowledge, each bit of data_pattern[15:0] are 32bit integer, for me I only want data_pattern to be a 16-bit binary.

After run the code (attach on this post), the data_pattern[0] returned to be 0111111111111111111111111111111 instead of a 32bit "0", which makes the final verilog module incorrect.

 Also no matter how the data_pattern set throught cadence instantce interface, the output is still unchanged. Means the data_pattern parameter can not be changed without changing the code.

 Thank you for your help in advance!!

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  • Andrew Beckett

    Having tried it and now actually looked at the code, it's clear why it doesn't work. The line:

    val[i]=data_pattern[i]*0;

    Is the problem. It multiplies the value by 0, so it always outputs 0. With the *0 removed from this line (I removed the $display, because it wasn't terribly informative), and with this as a spectre netlist:

    //
    I1 (d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 VDD VSS) data_pattern_gen
    I2 (e15 e14 e13 e12 e11 e10 e9 e8 e7 e6 e5 e4 e3 e2 e1 e0 VDD VSS) data_pattern_gen data_pattern=[1,0,1,1,0,1,1,1,0,1,1,0,1,0,0,1]
    VDD (VDD 0) vsource dc=2
    VSS (VSS 0) vsource dc=0

    ahdl_include "data_pattern_gen.va"

    tran tran stop=1u

    I get the attached waveforms (I used transient primarily so I could add a marker to show the y values in the legend).

    Regards,

    Andrew.

Reply
  • Andrew Beckett

    Having tried it and now actually looked at the code, it's clear why it doesn't work. The line:

    val[i]=data_pattern[i]*0;

    Is the problem. It multiplies the value by 0, so it always outputs 0. With the *0 removed from this line (I removed the $display, because it wasn't terribly informative), and with this as a spectre netlist:

    //
    I1 (d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 VDD VSS) data_pattern_gen
    I2 (e15 e14 e13 e12 e11 e10 e9 e8 e7 e6 e5 e4 e3 e2 e1 e0 VDD VSS) data_pattern_gen data_pattern=[1,0,1,1,0,1,1,1,0,1,1,0,1,0,0,1]
    VDD (VDD 0) vsource dc=2
    VSS (VSS 0) vsource dc=0

    ahdl_include "data_pattern_gen.va"

    tran tran stop=1u

    I get the attached waveforms (I used transient primarily so I could add a marker to show the y values in the legend).

    Regards,

    Andrew.

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