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ndio pcell gpdk045 nm

Hi all,

I am using the gpdk045 nm Library and am trying to layout two N-/Psub diodes (ndio pcell) in series between VDD and GND as shown in the figure using virtuoso 6.1.5. I have tried my best but my layout of these diodes fail to pass assura LVS. Can someone please show me how it's done. Thanks all for your contributions.

Andrew Beckett over 11 years ago

You didn't get an answer because you didn't provide enough details for anyone to really help you (please read the forum guidelines - the first post in the forum). Hopefully you've solved the issue by now...
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