• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
  3. do stb analysis on five stage invter ring osc

Stats

  • Locked Locked
  • Replies 3
  • Subscribers 125
  • Views 14293
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

do stb analysis on five stage invter ring osc

xianweng
xianweng over 11 years ago

 

 hi,everyone

       i designed a five stage ring osc,and each stage is made up of an inverter. I perform DC analysis first,and I found output voltage of each stage is at the half of VDD. Then I  do  stb analysis ,founding that when the phase shift is 180,the gain is below the 0dB. Which means that it can not oscsillate.But when I do tran ,it oscillate at 1.3GHz,which is very weir.

    My cadence version is IC615,MMSIM is 13.0

 

     Does anyone could helpe me figure it out?Thanks any help in advance
  • QQ截图20140604223139.jpg
  • View
  • Hide
  • Cancel
  • ShawnLogan
    ShawnLogan over 11 years ago

     Dear Xianweng,

     

    Your small signal stability simulation does not capture the physical delay of your inverter stages and hence the actual "phase" of the feedback from the last stage of your 5 stage ring to the input of its first stage. The propagation delays are a large signal effect. Hence, the stability is not accurately predicted by the stb analysis. The situation is analogous to predicting the stability of a sampled data frequencny synthesizer (i.e, one that uses a PFD as the phase-frequency detector). The sampled nature of the feedback and its delay is not predicted well when one uses a linear approximation to its transfer function.

     

    Shawn

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Andrew Beckett
    Andrew Beckett over 11 years ago

    Using pstb might be a better option. Of course, to use this on an oscillator, it would have to actually oscillate, but it can be used to give you the time-averaged loop gain over the period and from this give you an idea of the stability of the loop as the oscillator is actually operating.

    Regards,

    Andrew.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • xianweng
    xianweng over 11 years ago

     Thank you for you quick reply ,I understand now

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information